1 #ifndef DEVICE_PCIEXP_H
2 #define DEVICE_PCIEXP_H
12 #define ASPM_LTR_L12_THRESHOLD_VALUE_OFFSET 16
13 #define ASPM_LTR_L12_THRESHOLD_VALUE_MASK (0x3ff << ASPM_LTR_L12_THRESHOLD_VALUE_OFFSET)
14 #define ASPM_LTR_L12_THRESHOLD_SCALE_OFFSET 29
15 #define ASPM_LTR_L12_THRESHOLD_SCALE_MASK (0x7 << ASPM_LTR_L12_THRESHOLD_SCALE_OFFSET)
18 #define PCIE_LTR_MAX_NO_SNOOP_LATENCY_3146US 0x1003
20 #define PCIE_LTR_MAX_SNOOP_LATENCY_3146US 0x1003
23 unsigned int max_devfn);
#define PCI_EXP_TYPE_ROOT_PORT
#define PCI_EXP_TYPE_PCIE_BRIDGE
#define PCI_EXP_TYPE_DOWNSTREAM
static bool pciexp_is_downstream_port(int type)
unsigned int pciexp_find_next_extended_cap(const struct device *dev, unsigned int cap, unsigned int offset)
struct device_operations default_pciexp_ops_bus
unsigned int pciexp_find_extended_cap(const struct device *dev, unsigned int cap)
void pciexp_scan_bus(struct bus *bus, unsigned int min_devfn, unsigned int max_devfn)
struct device_operations default_pciexp_hotplug_ops_bus
void pciexp_hotplug_scan_bridge(struct device *dev)
void pciexp_scan_bridge(struct device *dev)
bool pciexp_get_ltr_max_latencies(struct device *dev, u16 *max_snoop, u16 *max_nosnoop)