coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
reset.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 // Use simple device model for this file even in ramstage
4 #define __SIMPLE_DEVICE__
5 
6 #include <device/pci_ops.h>
7 #include <cf9_reset.h>
8 #include <reset.h>
9 
10 #define HT_INIT_CONTROL 0x6c
11 #define HTIC_ColdR_Detect (1<<4)
12 #define HTIC_BIOSR_Detect (1<<5)
13 #define HTIC_INIT_Detect (1<<6)
14 
16 {
17  u32 htic;
18  htic = pci_s_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL);
19  htic &= ~HTIC_BIOSR_Detect;
20  pci_s_write_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL, htic);
21 }
22 
23 void do_board_reset(void)
24 {
25  system_reset();
26 }
void system_reset(void)
Definition: cf9_reset.c:37
void do_board_reset(void)
Definition: reset.c:8
static __always_inline uint32_t pci_s_read_config32(pci_devfn_t dev, uint16_t reg)
Definition: pci_io_cfg.h:92
static __always_inline void pci_s_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value)
Definition: pci_io_cfg.h:110
#define PCI_DEV(SEGBUS, DEV, FN)
Definition: pci_type.h:14
void cf9_reset_prepare(void)
Definition: reset.c:20
#define HT_INIT_CONTROL
Definition: reset.c:10
#define HTIC_BIOSR_Detect
Definition: reset.c:12
uint32_t u32
Definition: stdint.h:51