coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
memmap.c
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <
arch/romstage.h
>
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#include <
cbmem.h
>
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#include <
console/console.h
>
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#include <
cpu/x86/mtrr.h
>
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#include <
cpu/x86/smm.h
>
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#include <
intelblocks/fast_spi.h
>
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#include <
intelblocks/systemagent.h
>
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#include <
arch/bert_storage.h
>
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#include <types.h>
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/*
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* Expected Host Memory Map (we don't know 100% and not all regions are present on all SoCs):
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*
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* +---------------------------+ TOUUD
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* | |
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* +---------------------------+ TOM (if mem > 4GB)
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* | CSME UMA (if mem > 4 GiB) |
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* +---------------------------+ TOUUD
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* | |
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* +---------------------------+ 4GiB
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* | PCI Address Space |
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* +---------------------------+ TOM (if mem < 4GB)
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* | CSME UMA (if mem < 4 GiB) |
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* +---------------------------+ TOLUD (also maps into MC address space)
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* | iGD / DSM |
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* +---------------------------+ BDSM
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* | GTT / GSM |
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* +---------------------------+ TOLM
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* | TSEG |
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* +---------------------------+ TSEGMB
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* | DMA Protected Region |
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* +---------------------------+ DPR
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* | PRM (C6DRAM/SGX) |
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* +---------------------------+ PRMRR
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* | Probeless Trace |
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* +---------------------------+ ME Stolen
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* | PTT |
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* +---------------------------+ TOLUM / top_of_ram / cbmem_top
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* | CBMEM Root |
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* +---------------------------+
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* | FSP Reserved Memory |
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* +---------------------------+
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* | various CBMEM entries |
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* +---------------------------+ top_of_stack (8 byte aligned)
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* | stack (CBMEM entry) |
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* +---------------------------+ FSP TOLUM
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* | |
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* +---------------------------+ 0
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*/
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#define BERT_REGION_MAX_SIZE 0x10000
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void
smm_region
(
uintptr_t
*start,
size_t
*size)
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{
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*start =
sa_get_tseg_base
();
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*size =
sa_get_tseg_size
();
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}
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void
bert_reserved_region
(
void
**start,
size_t
*size)
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{
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*start =
cbmem_add
(
CBMEM_ID_ACPI_BERT
,
BERT_REGION_MAX_SIZE
);
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*size =
BERT_REGION_MAX_SIZE
;
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printk
(
BIOS_DEBUG
,
"Reserving BERT start %lx, size %zx\n"
, (
uintptr_t
)*start, *size);
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}
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void
fill_postcar_frame
(
struct
postcar_frame
*pcf)
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{
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/* FSP does not seem to bother w.r.t. alignment when asked to place cbmem_top() */
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uintptr_t
top_of_ram =
ALIGN_UP
((
uintptr_t
)
cbmem_top
(), 8 *
MiB
);
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/*
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* We need to make sure ramstage will be run cached. At this
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* point exact location of ramstage in cbmem is not known.
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* Instruct postcar to cache 16 megs below cbmem top which is
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* a safe bet to cover ramstage.
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*/
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printk
(
BIOS_DEBUG
,
"top_of_ram = 0x%lx\n"
, top_of_ram);
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postcar_frame_add_mtrr
(pcf, top_of_ram - 16 *
MiB
, 16 *
MiB
,
MTRR_TYPE_WRBACK
);
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/* Cache the TSEG region */
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postcar_enable_tseg_cache
(pcf);
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/* Cache the extended BIOS region if it is supported */
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fast_spi_cache_ext_bios_postcar
(pcf);
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}
romstage.h
postcar_frame_add_mtrr
void postcar_frame_add_mtrr(struct postcar_frame *pcf, uintptr_t addr, size_t size, int type)
Definition:
postcar_loader.c:71
postcar_enable_tseg_cache
void postcar_enable_tseg_cache(struct postcar_frame *pcf)
Definition:
postcar_loader.c:159
bert_storage.h
MiB
#define MiB
Definition:
helpers.h:76
ALIGN_UP
#define ALIGN_UP(x, a)
Definition:
helpers.h:17
cbmem.h
cbmem_top
void * cbmem_top(void)
Definition:
imd_cbmem.c:18
cbmem_add
void * cbmem_add(u32 id, u64 size)
Definition:
imd_cbmem.c:144
CBMEM_ID_ACPI_BERT
#define CBMEM_ID_ACPI_BERT
Definition:
cbmem_id.h:7
systemagent.h
sa_get_tseg_base
uintptr_t sa_get_tseg_base(void)
Definition:
systemagent_early.c:143
sa_get_tseg_size
size_t sa_get_tseg_size(void)
Definition:
systemagent_early.c:149
printk
#define printk(level,...)
Definition:
stdlib.h:16
console.h
fast_spi_cache_ext_bios_postcar
void fast_spi_cache_ext_bios_postcar(struct postcar_frame *pcf)
Definition:
fast_spi.c:280
fast_spi.h
smm.h
BIOS_DEBUG
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
Definition:
loglevel.h:128
fill_postcar_frame
void fill_postcar_frame(struct postcar_frame *pcf)
Definition:
memmap.c:63
smm_region
void smm_region(uintptr_t *start, size_t *size)
Definition:
memmap.c:50
bert_reserved_region
void bert_reserved_region(void **start, size_t *size)
Definition:
memmap.c:63
BERT_REGION_MAX_SIZE
#define BERT_REGION_MAX_SIZE
Definition:
memmap.c:53
uintptr_t
unsigned long uintptr_t
Definition:
stdint.h:21
postcar_frame
Definition:
romstage.h:18
mtrr.h
MTRR_TYPE_WRBACK
#define MTRR_TYPE_WRBACK
Definition:
mtrr.h:14
src
soc
intel
common
block
systemagent
memmap.c
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