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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <assert.h>
#include <commonlib/helpers.h>
#include <console/console.h>
#include <device/mmio.h>
#include <delay.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <intelblocks/cse.h>
#include <intelblocks/pmclib.h>
#include <option.h>
#include <security/vboot/misc.h>
#include <security/vboot/vboot_common.h>
#include <soc/intel/common/reset.h>
#include <soc/iomap.h>
#include <soc/pci_devs.h>
#include <soc/me.h>
#include <string.h>
#include <timer.h>
#include <types.h>
Go to the source code of this file.
Macros | |
#define | __SIMPLE_DEVICE__ |
#define | MAX_HECI_MESSAGE_RETRY_COUNT 5 |
#define | HECI_DELAY_READY_MS (15 * 1000) |
#define | HECI_DELAY_US 100 |
#define | HECI_SEND_TIMEOUT_MS (5 * 1000) |
#define | HECI_READ_TIMEOUT_MS (5 * 1000) |
#define | HECI_CIP_TIMEOUT_US 1000 |
#define | CSE_DELAY_BOOT_TO_RO_MS (5 * 1000) |
#define | SLOT_SIZE sizeof(uint32_t) |
#define | MMIO_CSE_CB_WW 0x00 |
#define | MMIO_HOST_CSR 0x04 |
#define | MMIO_CSE_CB_RW 0x08 |
#define | MMIO_CSE_CSR 0x0c |
#define | MMIO_CSE_DEVIDLE 0x800 |
#define | CSE_DEV_IDLE (1 << 2) |
#define | CSE_DEV_CIP (1 << 0) |
#define | CSR_IE (1 << 0) |
#define | CSR_IS (1 << 1) |
#define | CSR_IG (1 << 2) |
#define | CSR_READY (1 << 3) |
#define | CSR_RESET (1 << 4) |
#define | CSR_RP_START 8 |
#define | CSR_RP (((1 << 8) - 1) << CSR_RP_START) |
#define | CSR_WP_START 16 |
#define | CSR_WP (((1 << 8) - 1) << CSR_WP_START) |
#define | CSR_CBD_START 24 |
#define | CSR_CBD (((1 << 8) - 1) << CSR_CBD_START) |
#define | MEI_HDR_IS_COMPLETE (1 << 31) |
#define | MEI_HDR_LENGTH_START 16 |
#define | MEI_HDR_LENGTH_SIZE 9 |
#define | MEI_HDR_LENGTH |
#define | MEI_HDR_HOST_ADDR_START 8 |
#define | MEI_HDR_HOST_ADDR (((1 << 8) - 1) << MEI_HDR_HOST_ADDR_START) |
#define | MEI_HDR_CSE_ADDR_START 0 |
#define | MEI_HDR_CSE_ADDR (((1 << 8) - 1) << MEI_HDR_CSE_ADDR_START) |
#define CSR_CBD (((1 << 8) - 1) << CSR_CBD_START) |
#define CSR_RP (((1 << 8) - 1) << CSR_RP_START) |
#define CSR_WP (((1 << 8) - 1) << CSR_WP_START) |
#define MEI_HDR_CSE_ADDR (((1 << 8) - 1) << MEI_HDR_CSE_ADDR_START) |
#define MEI_HDR_HOST_ADDR (((1 << 8) - 1) << MEI_HDR_HOST_ADDR_START) |
#define MEI_HDR_LENGTH |
Definition at line 222 of file cse.c.
References ALIGN_UP, and SLOT_SIZE.
Referenced by heci_receive().
Definition at line 173 of file cse.c.
References CSR_IS, read_host_csr(), and write_host_csr().
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Definition at line 234 of file cse.c.
References me_hfsts1::data, me_hfsts1::fields, me_read_config32(), me_hfsts1::operation_mode, and PCI_ME_HFSTS1.
Referenced by cse_is_hfs1_com_normal(), cse_is_hfs1_com_secover_mei_msg(), and cse_is_hfs1_com_soft_temp_disable().
Definition at line 1023 of file cse.c.
References CONFIG, cse_is_hfs1_spi_protected(), pmc_global_reset_disable_and_lock(), and pmc_global_reset_enable().
Definition at line 160 of file cse.c.
References filled_slots(), and read_cse_csr().
Referenced by wait_read_slots().
int cse_hmrfpo_enable | ( | void | ) |
Definition at line 748 of file cse.c.
References __packed, BIOS_DEBUG, BIOS_ERR, cse_is_hfs1_com_secover_mei_msg(), cse_is_hmrfpo_enable_allowed(), HECI_MKHI_ADDR, heci_send_receive(), MKHI_GROUP_ID_HMRFPO, MKHI_HMRFPO_ENABLE, and printk.
Referenced by cse_prep_for_component_update(), and cse_prep_for_rw_update().
int cse_hmrfpo_get_status | ( | void | ) |
Definition at line 812 of file cse.c.
References __packed, BIOS_ERR, BIOS_INFO, cse_is_hfs1_cws_normal(), HECI_MKHI_ADDR, heci_send_receive(), MKHI_GROUP_ID_HMRFPO, MKHI_HMRFPO_GET_STATUS, and printk.
Definition at line 650 of file cse.c.
References cse_is_hfs1_com_normal(), cse_is_hfs1_com_secover_mei_msg(), cse_is_hfs1_com_soft_temp_disable(), cse_is_hfs1_cws_normal(), and cse_is_hfs3_fw_sku_lite().
Referenced by cse_request_reset().
Definition at line 250 of file cse.c.
References cse_check_hfs1_com(), and ME_HFS1_COM_NORMAL.
Referenced by cse_is_bp_cmd_info_possible(), cse_is_global_reset_allowed(), cse_is_hmrfpo_enable_allowed(), and platform_fsp_silicon_init_params_cb().
Definition at line 255 of file cse.c.
References cse_check_hfs1_com(), and ME_HFS1_COM_SECOVER_MEI_MSG.
Referenced by cse_hmrfpo_enable(), cse_is_bp_cmd_info_possible(), cse_is_global_reset_allowed(), and cse_wait_sec_override_mode().
Definition at line 260 of file cse.c.
References cse_check_hfs1_com(), and ME_HFS1_COM_SOFT_TEMP_DISABLE.
Referenced by cse_data_clear_request(), cse_is_bp_cmd_info_possible(), cse_is_global_reset_allowed(), cse_is_hmrfpo_enable_allowed(), and cse_wait_com_soft_temp_disable().
Definition at line 241 of file cse.c.
References me_hfsts1::data, me_hfsts1::fields, ME_HFS1_CWS_NORMAL, me_read_config32(), PCI_ME_HFSTS1, and me_hfsts1::working_state.
Referenced by cse_data_clear_request(), cse_hmrfpo_get_status(), cse_is_bp_cmd_info_possible(), cse_is_global_reset_allowed(), and cse_is_hmrfpo_enable_allowed().
Definition at line 274 of file cse.c.
References me_hfsts1::data, me_hfsts1::fields, me_read_config32(), me_hfsts1::mfg_mode, and PCI_ME_HFSTS1.
Referenced by cse_control_global_reset_lock().
Definition at line 281 of file cse.c.
References me_hfsts3::data, me_hfsts3::fields, me_hfsts3::fw_sku, ME_HFS3_FW_SKU_LITE, me_read_config32(), and PCI_ME_HFSTS3.
Referenced by cse_is_global_reset_allowed(), cse_is_hmrfpo_enable_allowed(), and platform_fsp_silicon_init_params_cb().
Definition at line 727 of file cse.c.
References cse_is_hfs1_com_normal(), cse_is_hfs1_com_soft_temp_disable(), cse_is_hfs1_cws_normal(), and cse_is_hfs3_fw_sku_lite().
Referenced by cse_hmrfpo_enable().
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Definition at line 227 of file cse.c.
References CSR_READY, and read_cse_csr().
Referenced by heci_receive(), and wait_heci_ready().
int cse_request_global_reset | ( | void | ) |
Definition at line 722 of file cse.c.
References cse_request_reset(), and GLOBAL_RESET.
Referenced by do_global_reset(), and send_global_reset().
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Definition at line 676 of file cse.c.
References __packed, BIOS_DEBUG, BIOS_ERR, BIOS_HOST_ADDR, cse_is_global_reset_allowed(), CSE_RESET_ONLY, GLOBAL_RESET, GR_ORIGIN_BIOS_POST, HECI_MKHI_ADDR, heci_reset(), heci_send(), heci_send_receive(), is_cse_enabled(), memset(), MKHI_CBM_GLOBAL_RESET_REQ, MKHI_GROUP_ID_CBM, and printk.
Referenced by cse_request_global_reset().
Definition at line 289 of file cse.c.
References CSR_IG, CSR_READY, CSR_RESET, read_host_csr(), and write_host_csr().
Referenced by heci_reset().
Definition at line 1003 of file cse.c.
References DEV_IDLE, is_cse_devfn_visible(), PCH_DEVFN_CSE, and set_cse_device_state().
void cse_trigger_vboot_recovery | ( | enum csme_failure_reason | reason | ) |
Definition at line 918 of file cse.c.
References BIOS_DEBUG, CONFIG, die(), me_read_config32(), NULL, PCI_ME_HFSTS1, PCI_ME_HFSTS2, PCI_ME_HFSTS3, printk, vboot_get_context(), vboot_reboot(), and vboot_save_data().
Referenced by cse_sub_part_fw_component_update(), and handle_cse_eop_result().
Definition at line 319 of file cse.c.
References BIOS_ERR, BIOS_SPEW, CSE_DELAY_BOOT_TO_RO_MS, cse_is_hfs1_com_soft_temp_disable(), HECI_DELAY_US, printk, stopwatch_duration_msecs(), stopwatch_expired(), stopwatch_init_msecs_expire(), and udelay().
Definition at line 299 of file cse.c.
References BIOS_DEBUG, BIOS_ERR, cse_is_hfs1_com_secover_mei_msg(), HECI_DELAY_READY_MS, HECI_DELAY_US, printk, stopwatch_duration_msecs(), stopwatch_expired(), stopwatch_init_msecs_expire(), and udelay().
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Definition at line 936 of file cse.c.
References CSE_DEV_CIP, CSE_DEV_IDLE, HECI_CIP_TIMEOUT_US, HECI_DELAY_US, MMIO_CSE_DEVIDLE, read_bar(), stopwatch_expired(), stopwatch_init_usecs_expire(), udelay(), and write_bar().
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Definition at line 954 of file cse.c.
References CSE_DEV_IDLE, MMIO_CSE_DEVIDLE, read_bar(), and write_bar().
Referenced by ensure_cse_idle().
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Definition at line 954 of file cse.c.
Referenced by set_cse_device_state().
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Definition at line 980 of file cse.c.
References enable_cse_idle(), pci_and_config32(), PCI_COMMAND, PCI_COMMAND_MASTER, and PCI_COMMAND_MEMORY.
Referenced by set_cse_device_state().
Definition at line 152 of file cse.c.
References CSR_RP_START, and CSR_WP_START.
Referenced by cse_filled_slots(), and host_empty_slots().
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Definition at line 74 of file cse.c.
References assert, PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_MEM_ATTR_MASK, and pci_read_config32().
Referenced by heci_init(), read_bar(), and write_bar().
enum cse_device_state get_cse_device_state | ( | unsigned int | devfn | ) |
Definition at line 954 of file cse.c.
Referenced by set_cse_device_state().
enum cb_err get_me_fw_version | ( | struct me_fw_ver_resp * | resp | ) |
Definition at line 855 of file cse.c.
References BIOS_DEBUG, me_version::build, CB_SUCCESS, me_fw_ver_resp::code, CONFIG, me_version::hotfix, me_version::major, me_version::minor, and printk.
Definition at line 357 of file cse.c.
References MEI_HDR_LENGTH, and MEI_HDR_LENGTH_START.
Referenced by heci_receive().
Definition at line 92 of file cse.c.
References get_cse_bar(), HECI1_BASE_ADDRESS, heci_reset(), is_cse_enabled(), PCH_DEV_CSE, PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_1, PCI_COMMAND, PCI_COMMAND_MASTER, PCI_COMMAND_MEMORY, pci_or_config16(), pci_read_config16(), pci_write_config16(), and pci_write_config32().
Referenced by mainboard_romstage_entry().
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Definition at line 363 of file cse.c.
References ALIGN_DOWN, bytes_to_slots(), cse_ready(), hdr_get_length(), host_gen_interrupt(), memcpy(), SLOT_SIZE, wait_write_slots(), and write_slot().
int heci_reset | ( | void | ) |
Definition at line 599 of file cse.c.
References BIOS_CRIT, cse_set_host_ready(), CSR_IG, CSR_RESET, post_code, printk, read_host_csr(), wait_heci_ready(), and write_host_csr().
Referenced by cse_request_reset(), and heci_init().
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Definition at line 363 of file cse.c.
Referenced by cse_request_reset().
enum cse_tx_rx_status heci_send_receive | ( | const void * | snd_msg, |
size_t | snd_sz, | ||
void * | rcv_msg, | ||
size_t * | rcv_sz, | ||
uint8_t | cse_addr | ||
) |
Definition at line 363 of file cse.c.
Referenced by cse_data_clear_request(), cse_get_boot_performance_data(), cse_get_bp_info(), cse_hmrfpo_enable(), cse_hmrfpo_get_status(), cse_request_reset(), cse_set_next_boot_partition(), and load_cached_fpf().
Definition at line 1012 of file cse.c.
References DEV_IDLE, is_cse_devfn_visible(), PCH_DEV_SLOT_CSE, PCI_DEVFN, and set_cse_device_state().
Referenced by heci_finalize().
Definition at line 165 of file cse.c.
References CSR_CBD, CSR_CBD_START, filled_slots(), and read_host_csr().
Referenced by wait_write_slots().
Definition at line 349 of file cse.c.
References CSR_IG, read_host_csr(), and write_host_csr().
Referenced by heci_receive().
Definition at line 622 of file cse.c.
References BIOS_WARNING, is_devfn_enabled(), PCI_DEV, PCI_FUNC, pci_read_config16(), PCI_SLOT, PCI_VENDOR_ID, and printk.
Referenced by cse_set_to_d0i3(), heci_set_to_d0i3(), and is_cse_enabled().
Definition at line 640 of file cse.c.
References is_cse_devfn_visible(), and PCH_DEVFN_CSE.
Referenced by cse_get_telemetry_data(), cse_request_reset(), do_send_end_of_post(), dump_cse_state(), dump_me_status(), heci_init(), intel_me_status(), and send_global_reset().
uint32_t me_read_config32 | ( | int | offset | ) |
Definition at line 645 of file cse.c.
References offset, PCH_DEV_CSE, and pci_read_config32().
Referenced by cse_check_hfs1_com(), cse_is_hfs1_cws_normal(), cse_is_hfs1_spi_protected(), cse_is_hfs3_fw_sku_lite(), cse_trigger_vboot_recovery(), dump_me_status(), dump_status(), intel_me_status(), and send_global_reset().
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Definition at line 127 of file cse.c.
References get_cse_bar(), offset, and read32p().
Referenced by disable_cse_idle(), enable_cse_idle(), read_cse_csr(), read_host_csr(), and read_slot().
Definition at line 137 of file cse.c.
References MMIO_CSE_CSR, PCH_DEV_CSE, and read_bar().
Referenced by cse_filled_slots(), and cse_ready().
Definition at line 142 of file cse.c.
References MMIO_HOST_CSR, PCH_DEV_CSE, and read_bar().
Referenced by clear_int(), cse_set_host_ready(), heci_reset(), host_empty_slots(), and host_gen_interrupt().
Definition at line 181 of file cse.c.
References MMIO_CSE_CB_RW, PCH_DEV_CSE, and read_bar().
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bool set_cse_device_state | ( | unsigned int | devfn, |
enum cse_device_state | requested_state | ||
) |
Definition at line 987 of file cse.c.
References DEV_ACTIVE, ensure_cse_active(), ensure_cse_idle(), get_cse_device_state(), PCI_DEV, PCI_FUNC, and PCI_SLOT.
Referenced by cse_set_to_d0i3(), do_send_end_of_post(), and heci_set_to_d0i3().
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Definition at line 335 of file cse.c.
References cse_ready(), HECI_DELAY_READY_MS, HECI_DELAY_US, stopwatch_expired(), stopwatch_init_msecs_expire(), and udelay().
Referenced by heci_reset().
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Definition at line 206 of file cse.c.
References BIOS_ERR, cse_filled_slots(), HECI_DELAY_US, HECI_READ_TIMEOUT_MS, printk, stopwatch_expired(), stopwatch_init_msecs_expire(), and udelay().
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Definition at line 191 of file cse.c.
References BIOS_ERR, HECI_DELAY_US, HECI_SEND_TIMEOUT_MS, host_empty_slots(), printk, stopwatch_expired(), stopwatch_init_msecs_expire(), and udelay().
Referenced by heci_receive().
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Definition at line 132 of file cse.c.
References get_cse_bar(), offset, val, and write32p().
Referenced by disable_cse_idle(), enable_cse_idle(), write_host_csr(), and write_slot().
Definition at line 147 of file cse.c.
References MMIO_HOST_CSR, PCH_DEV_CSE, and write_bar().
Referenced by clear_int(), cse_set_host_ready(), heci_reset(), and host_gen_interrupt().
Definition at line 186 of file cse.c.
References MMIO_CSE_CB_WW, PCH_DEV_CSE, val, and write_bar().
Referenced by heci_receive().