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Macros
#define	IRONLAKE_BCLK 133

#define	MSR_CORE_THREAD_COUNT 0x35

#define	MSR_FEATURE_CONFIG 0x13c

#define	MSR_FLEX_RATIO 0x194

#define	FLEX_RATIO_LOCK (1 << 20)

#define	FLEX_RATIO_EN (1 << 16)

#define	MSR_TEMPERATURE_TARGET 0x1a2

#define	IA32_FERR_CAPABILITY 0x1f1

#define	FERR_ENABLE (1 << 0)

#define	MSR_PLATFORM_INFO 0xce

#define	PLATFORM_INFO_SET_TDP (1 << 29)

#define	MSR_MISC_PWR_MGMT 0x1aa

#define	MISC_PWR_MGMT_EIST_HW_DIS (1 << 0)

#define	MSR_TURBO_POWER_CURRENT_LIMIT 0x1ac

#define	MSR_TURBO_RATIO_LIMIT 0x1ad

#define	MSR_POWER_CTL 0x1fc

#define	MSR_PKGC3_IRTL 0x60a

#define	MSR_PKGC6_IRTL 0x60b

#define	MSR_PKGC7_IRTL 0x60c

#define	IRTL_VALID (1 << 15)

#define	IRTL_1_NS (0 << 10)

#define	IRTL_32_NS (1 << 10)

#define	IRTL_1024_NS (2 << 10)

#define	IRTL_32768_NS (3 << 10)

#define	IRTL_1048576_NS (4 << 10)

#define	IRTL_33554432_NS (5 << 10)

#define	IRTL_RESPONSE_MASK (0x3ff)

#define	MSR_PKG_POWER_LIMIT 0x610

#define	PKG_POWER_LIMIT_MASK 0x7fff

#define	PKG_POWER_LIMIT_EN (1 << 15)

#define	PKG_POWER_LIMIT_CLAMP (1 << 16)

#define	PKG_POWER_LIMIT_TIME_SHIFT 17

#define	PKG_POWER_LIMIT_TIME_MASK 0x7f

#define	PSS_MAX_ENTRIES 16

#define	PSS_RATIO_STEP 1

#define	PSS_LATENCY_TRANSITION 10

#define	PSS_LATENCY_BUSMASTER 10

Functions
void	intel_model_2065x_finalize_smm (void)

void	set_power_limits (u8 power_limit_1_time)

Macro Definition Documentation

◆ FERR_ENABLE

#define FERR_ENABLE (1 << 0)

Definition at line 16 of file model_2065x.h.

◆ FLEX_RATIO_EN

#define FLEX_RATIO_EN (1 << 16)

Definition at line 13 of file model_2065x.h.

◆ FLEX_RATIO_LOCK

#define FLEX_RATIO_LOCK (1 << 20)

Definition at line 12 of file model_2065x.h.

◆ IA32_FERR_CAPABILITY

#define IA32_FERR_CAPABILITY 0x1f1

Definition at line 15 of file model_2065x.h.

◆ IRONLAKE_BCLK

#define IRONLAKE_BCLK 133

Definition at line 7 of file model_2065x.h.

◆ IRTL_1024_NS

#define IRTL_1024_NS (2 << 10)

Definition at line 33 of file model_2065x.h.

◆ IRTL_1048576_NS

#define IRTL_1048576_NS (4 << 10)

Definition at line 35 of file model_2065x.h.

◆ IRTL_1_NS

#define IRTL_1_NS (0 << 10)

Definition at line 31 of file model_2065x.h.

◆ IRTL_32768_NS

#define IRTL_32768_NS (3 << 10)

Definition at line 34 of file model_2065x.h.

◆ IRTL_32_NS

#define IRTL_32_NS (1 << 10)

Definition at line 32 of file model_2065x.h.

◆ IRTL_33554432_NS

#define IRTL_33554432_NS (5 << 10)

Definition at line 36 of file model_2065x.h.

◆ IRTL_RESPONSE_MASK

#define IRTL_RESPONSE_MASK (0x3ff)

Definition at line 37 of file model_2065x.h.

◆ IRTL_VALID

#define IRTL_VALID (1 << 15)

Definition at line 30 of file model_2065x.h.

◆ MISC_PWR_MGMT_EIST_HW_DIS

#define MISC_PWR_MGMT_EIST_HW_DIS (1 << 0)

Definition at line 22 of file model_2065x.h.

◆ MSR_CORE_THREAD_COUNT

#define MSR_CORE_THREAD_COUNT 0x35

Definition at line 9 of file model_2065x.h.

◆ MSR_FEATURE_CONFIG

#define MSR_FEATURE_CONFIG 0x13c

Definition at line 10 of file model_2065x.h.

◆ MSR_FLEX_RATIO

#define MSR_FLEX_RATIO 0x194

Definition at line 11 of file model_2065x.h.

◆ MSR_MISC_PWR_MGMT

#define MSR_MISC_PWR_MGMT 0x1aa

Definition at line 21 of file model_2065x.h.

◆ MSR_PKG_POWER_LIMIT

#define MSR_PKG_POWER_LIMIT 0x610

Definition at line 40 of file model_2065x.h.

◆ MSR_PKGC3_IRTL

#define MSR_PKGC3_IRTL 0x60a

Definition at line 27 of file model_2065x.h.

◆ MSR_PKGC6_IRTL

#define MSR_PKGC6_IRTL 0x60b

Definition at line 28 of file model_2065x.h.

◆ MSR_PKGC7_IRTL

#define MSR_PKGC7_IRTL 0x60c

Definition at line 29 of file model_2065x.h.

◆ MSR_PLATFORM_INFO

#define MSR_PLATFORM_INFO 0xce

Definition at line 18 of file model_2065x.h.

◆ MSR_POWER_CTL

#define MSR_POWER_CTL 0x1fc

Definition at line 25 of file model_2065x.h.

◆ MSR_TEMPERATURE_TARGET

#define MSR_TEMPERATURE_TARGET 0x1a2

Definition at line 14 of file model_2065x.h.

◆ MSR_TURBO_POWER_CURRENT_LIMIT

#define MSR_TURBO_POWER_CURRENT_LIMIT 0x1ac

Definition at line 23 of file model_2065x.h.

◆ MSR_TURBO_RATIO_LIMIT

#define MSR_TURBO_RATIO_LIMIT 0x1ad

Definition at line 24 of file model_2065x.h.

◆ PKG_POWER_LIMIT_CLAMP

#define PKG_POWER_LIMIT_CLAMP (1 << 16)

Definition at line 43 of file model_2065x.h.

◆ PKG_POWER_LIMIT_EN

#define PKG_POWER_LIMIT_EN (1 << 15)

Definition at line 42 of file model_2065x.h.

◆ PKG_POWER_LIMIT_MASK

#define PKG_POWER_LIMIT_MASK 0x7fff

Definition at line 41 of file model_2065x.h.

◆ PKG_POWER_LIMIT_TIME_MASK

#define PKG_POWER_LIMIT_TIME_MASK 0x7f

Definition at line 45 of file model_2065x.h.

◆ PKG_POWER_LIMIT_TIME_SHIFT

#define PKG_POWER_LIMIT_TIME_SHIFT 17

Definition at line 44 of file model_2065x.h.

◆ PLATFORM_INFO_SET_TDP

#define PLATFORM_INFO_SET_TDP (1 << 29)

Definition at line 19 of file model_2065x.h.

◆ PSS_LATENCY_BUSMASTER

#define PSS_LATENCY_BUSMASTER 10

Definition at line 51 of file model_2065x.h.

◆ PSS_LATENCY_TRANSITION

#define PSS_LATENCY_TRANSITION 10

Definition at line 50 of file model_2065x.h.

◆ PSS_MAX_ENTRIES

#define PSS_MAX_ENTRIES 16

Definition at line 48 of file model_2065x.h.

◆ PSS_RATIO_STEP

#define PSS_RATIO_STEP 1

Definition at line 49 of file model_2065x.h.

Function Documentation

◆ intel_model_2065x_finalize_smm()

void intel_model_2065x_finalize_smm ( void )

Definition at line 14 of file finalize.c.

References BIT, MSR_MISC_PWR_MGMT, MSR_PKG_CST_CONFIG_CONTROL, and msr_set().

Referenced by southbridge_finalize_all().

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◆ set_power_limits()

void set_power_limits ( u8 power_limit_1_time )

Definition at line 313 of file haswell_init.c.

Macros

Functions