coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
finalize.c
Go to the documentation of this file.
1
/* SPDX-License-Identifier: GPL-2.0-only */
2
3
#include <types.h>
4
#include <
cpu/x86/msr.h
>
5
#include <
cpu/intel/speedstep.h
>
6
7
#include "
model_2065x.h
"
8
9
/* MSR Documentation based on
10
* "Sandy Bridge Processor Family BIOS Writer's Guide (BWG)"
11
* Document Number 504790
12
* Revision 1.6.0, June 2012 */
13
14
void
intel_model_2065x_finalize_smm
(
void
)
15
{
16
/* Lock C-State MSR */
17
msr_set
(
MSR_PKG_CST_CONFIG_CONTROL
,
BIT
(15));
18
19
/* Lock TM interrupts - route thermal events to all processors */
20
msr_set
(
MSR_MISC_PWR_MGMT
,
BIT
(22));
21
}
MSR_MISC_PWR_MGMT
#define MSR_MISC_PWR_MGMT
Definition:
haswell.h:51
MSR_PKG_CST_CONFIG_CONTROL
#define MSR_PKG_CST_CONFIG_CONTROL
Definition:
haswell.h:41
intel_model_2065x_finalize_smm
void intel_model_2065x_finalize_smm(void)
Definition:
finalize.c:14
BIT
#define BIT(nr)
Definition:
ec_commands.h:45
msr.h
msr_set
static void msr_set(unsigned int reg, uint64_t set)
Helper for setting MSR bitmasks.
Definition:
msr.h:381
model_2065x.h
speedstep.h
src
cpu
intel
model_2065x
finalize.c
Generated by
1.9.1