coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
device.h
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1 /******************************************************************************
2  * Copyright (c) 2004, 2008 IBM Corporation
3  * Copyright (c) 2008, 2009 Pattrick Hueper <phueper@hueper.net>
4  *
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32  * IBM Corporation - initial implementation
33  *****************************************************************************/
34 
35 #ifndef DEVICE_LIB_H
36 #define DEVICE_LIB_H
37 
38 #include <types.h>
39 #include <endian.h>
40 #include "compat/of.h"
41 #include "debug.h"
42 
43 // a Expansion Header Struct as defined in Plug and Play BIOS Spec 1.0a Chapter 3.2
44 typedef struct {
45  char signature[4]; // signature
47  u8 length; // in 16 byte blocks
48  u16 next_header_offset; // offset to next Expansion Header as 16bit little-endian value, as offset from the start of the Expansion ROM
50  u8 checksum; // the sum of all bytes of the Expansion Header must be 0
51  u32 device_id; // PnP Device ID as 32bit little-endian value
52  u16 p_manufacturer_string; //16bit little-endian offset from start of Expansion ROM
53  u16 p_product_string; //16bit little-endian offset from start of Expansion ROM
58  // the following vectors are all 16bit little-endian offsets from start of Expansion ROM
59  u16 bcv; // Boot Connection Vector
60  u16 dv; // Disconnect Vector
61  u16 bev; // Bootstrap Entry Vector
63  u16 sriv; // Static Resource Information Vector
64 } __packed exp_header_struct_t;
65 
66 // a PCI Data Struct as defined in PCI 2.3 Spec Chapter 6.3.1.2
67 typedef struct {
68  u8 signature[4]; // signature, the String "PCIR"
72  u16 pci_ds_length; // PCI Data Structure Length, 16bit little-endian value
74  u8 class_code[3];
75  u16 img_length; // length of the Exp.ROM Image, 16bit little-endian value in 512 bytes
79  u16 reserved_2;
80 } __packed pci_data_struct_t;
81 
82 typedef struct {
85 #if CONFIG(PCI_OPTION_ROM_RUN_YABEL)
86  struct device* dev;
87  u64 puid; /* unused */
88 #else
89  void *dev;
93 #endif
94  // store the address of the BAR that is used to simulate
95  // legacy VGA memory accesses
98  // used to buffer I/O Accesses, that do not access the I/O Range of the device...
99  // 64k might be overkill, but we can buffer all I/O accesses...
100  u8 io_buffer[64 * 1024];
103  // translated address of the "PC-Compatible" Expansion ROM Image for this device
104  unsigned long img_addr;
105  u32 img_size; // size of the Expansion ROM Image (read from the PCI Data Structure)
107 
108 typedef struct {
109 #if CONFIG(PCI_OPTION_ROM_RUN_YABEL)
110  unsigned long info;
111 #else
112  u8 info;
113 #endif
114  u8 bus;
115  u8 devfn;
116  u8 cfg_space_offset;
117  u64 address;
119  u64 size;
120 } __packed translate_address_t;
121 
122 // array to store address translations for this
123 // device. Needed for faster address translation, so
124 // not every I/O or Memory Access needs to call translate_address_dev
125 // and access the device tree
126 // 6 BARs, 1 Exp. ROM, 1 Cfg.Space, and 3 Legacy, plus 2 "special"
127 // translations are supported... this should be enough for
128 // most devices... for VGA it is enough anyways...
129 extern translate_address_t translate_address_array[13];
130 
131 // index of last translate_address_array entry
132 // set by get_dev_addr_info function
133 extern u8 taa_last_entry;
134 
135 // add 1:1 mapped memory regions to translation table
136 void biosemu_add_special_memory(u32 start, u32 size);
137 
138 /* the device we are working with... */
140 
141 u8 biosemu_dev_init(struct device * device);
142 // NOTE: for dev_check_exprom to work, biosemu_dev_init MUST be called first!
143 u8 biosemu_dev_check_exprom(unsigned long rom_base_addr);
144 
145 u8 biosemu_dev_translate_address(int type, unsigned long * addr);
146 
147 /* endianness swap functions for 16 and 32 bit words
148  * copied from axon_pciconfig.c
149  */
150 static inline void
152 {
153 #if ENV_X86 || ENV_ARM || ENV_ARM64
154  *((u32*) addr) = cpu_to_le32(val);
155 #else
156  asm volatile ("stwbrx %0, 0, %1"::"r" (val), "r"(addr));
157 #endif
158 }
159 
160 static inline u32
161 in32le(void *addr)
162 {
163  u32 val;
164 #if ENV_X86 || ENV_ARM || ENV_ARM64
165  val = cpu_to_le32(*((u32 *) addr));
166 #else
167  asm volatile ("lwbrx %0, 0, %1":"=r" (val):"r"(addr));
168 #endif
169  return val;
170 }
171 
172 static inline void
174 {
175 #if ENV_X86 || ENV_ARM || ENV_ARM64
176  *((u16*) addr) = cpu_to_le16(val);
177 #else
178  asm volatile ("sthbrx %0, 0, %1"::"r" (val), "r"(addr));
179 #endif
180 }
181 
182 static inline u16
183 in16le(void *addr)
184 {
185  u16 val;
186 #if ENV_X86 || ENV_ARM || ENV_ARM64
187  val = cpu_to_le16(*((u16*) addr));
188 #else
189  asm volatile ("lhbrx %0, 0, %1":"=r" (val):"r"(addr));
190 #endif
191  return val;
192 }
193 
194 /* debug function, dumps HID1 and HID4 to detect whether caches are on/off */
195 static inline void
196 dumpHID(void)
197 {
198  u64 hid;
199  //HID1 = 1009
200  __asm__ __volatile__("mfspr %0, 1009":"=r"(hid));
201  printf("HID1: %016llx\n", (unsigned long long)hid);
202  //HID4 = 1012
203  __asm__ __volatile__("mfspr %0, 1012":"=r"(hid));
204  printf("HID4: %016llx\n", (unsigned long long)hid);
205 }
206 
207 #endif
static u32 addr
Definition: cirrus.c:14
#define printf(x...)
Definition: debug.h:47
biosemu_device_t bios_device
Definition: device.c:46
static void dumpHID(void)
Definition: device.h:196
u8 taa_last_entry
Definition: device.c:49
u8 biosemu_dev_check_exprom(unsigned long rom_base_addr)
Definition: device.c:331
static u16 in16le(void *addr)
Definition: device.h:183
void biosemu_add_special_memory(u32 start, u32 size)
Definition: device.c:235
u8 biosemu_dev_init(struct device *device)
Definition: device.c:429
translate_address_t translate_address_array[13]
Definition: device.c:48
u8 biosemu_dev_translate_address(int type, unsigned long *addr)
Definition: device.c:460
static u32 in32le(void *addr)
Definition: device.h:161
static void out16le(void *addr, u16 val)
Definition: device.h:173
static void out32le(void *addr, u32 val)
Definition: device.h:151
static struct smmstore_params_info info
Definition: ramstage.c:12
uint64_t address
Definition: fw_cfg_if.h:0
unsigned int type
Definition: edid.c:57
#define ihandle_t
Definition: of.h:40
#define phandle_t
Definition: of.h:39
uint64_t u64
Definition: stdint.h:54
uint32_t u32
Definition: stdint.h:51
uint16_t u16
Definition: stdint.h:48
uint8_t u8
Definition: stdint.h:45
Definition: x86.c:23
u16 p_product_string
Definition: device.h:53
u16 p_manufacturer_string
Definition: device.h:52
u16 vendor_id
Definition: device.h:69
u8 checksum
Definition: device.h:50
u16 img_length
Definition: device.h:75
u8 device_indicators
Definition: device.h:57
u16 bcv
Definition: device.h:59
u16 reserved_2
Definition: device.h:62
u16 sriv
Definition: device.h:63
u16 reserved
Definition: device.h:71
u64 address_offset
Definition: device.h:118
u16 img_revision
Definition: device.h:76
u8 device_base_type
Definition: device.h:54
u16 bev
Definition: device.h:61
u16 next_header_offset
Definition: device.h:48
u8 device_sub_type
Definition: device.h:55
u32 device_id
Definition: device.h:51
u8 indicator
Definition: device.h:78
u8 code_type
Definition: device.h:77
u8 device_if_type
Definition: device.h:56
u8 length
Definition: device.h:47
u16 dv
Definition: device.h:60
u16 pci_ds_length
Definition: device.h:72
u8 pci_ds_revision
Definition: device.h:73
u8 reserved
Definition: device.h:49
u8 structure_revision
Definition: device.h:46
ihandle_t ihandle
Definition: device.h:92
u16 pci_vendor_id
Definition: device.h:101
u16 pci_device_id
Definition: device.h:102
unsigned long img_addr
Definition: device.h:104
phandle_t phandle
Definition: device.h:91
void * dev
Definition: device.h:89
Definition: device.h:107
DEVTREE_CONST struct bus * bus
Definition: device.h:108
u8 val
Definition: sys.c:300