coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
bootblock.c
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <
bootblock_common.h
>
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#include <
device/pci_def.h
>
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#include <
device/pci_ops.h
>
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#include <
intelblocks/lpc_lib.h
>
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#include <
intelblocks/pcr.h
>
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#include <soc/pci_devs.h>
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#include <soc/pcr_ids.h>
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#include <
superio/aspeed/ast2400/ast2400.h
>
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#include <
superio/aspeed/common/aspeed.h
>
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#include "include/gpio.h"
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void
bootblock_mainboard_early_init
(
void
)
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{
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/* Configure Lewisburg PCH GPIOs */
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gpio_configure_pads
(
gpio_table
,
ARRAY_SIZE
(
gpio_table
));
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/* Enable COM1 only */
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pcr_write32
(
PID_DMI
, 0x2770, 0);
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pcr_write32
(
PID_DMI
, 0x2774, 1);
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/* Decode for SuperIO (0x2e) and COM1 (0x3f8) */
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pci_s_write_config32
(
PCH_DEV_LPC
, 0x80, (1 << 28) | (1 << 16));
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const
pnp_devfn_t
serial_dev =
PNP_DEV
(0x2e,
AST2400_SUART1
);
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aspeed_enable_serial
(serial_dev, CONFIG_TTYS0_BASE);
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}
PID_DMI
#define PID_DMI
Definition:
pcr_ids.h:23
aspeed.h
aspeed_enable_serial
void aspeed_enable_serial(pnp_devfn_t dev, uint16_t iobase)
Definition:
early_serial.c:45
ast2400.h
AST2400_SUART1
#define AST2400_SUART1
Definition:
ast2400.h:6
bootblock_common.h
ARRAY_SIZE
#define ARRAY_SIZE(a)
Definition:
helpers.h:12
pcr.h
pcr_write32
void pcr_write32(uint8_t pid, uint16_t offset, uint32_t indata)
Definition:
pcr.c:124
pci_ops.h
bootblock_mainboard_early_init
__weak void bootblock_mainboard_early_init(void)
Definition:
bootblock.c:16
lpc_lib.h
gpio_table
static const struct pad_config gpio_table[]
Definition:
bootblock.c:11
pci_def.h
pci_s_write_config32
static __always_inline void pci_s_write_config32(pci_devfn_t dev, uint16_t reg, uint32_t value)
Definition:
pci_io_cfg.h:110
PNP_DEV
#define PNP_DEV(PORT, FUNC)
Definition:
pnp_type.h:10
pnp_devfn_t
u32 pnp_devfn_t
Definition:
pnp_type.h:8
gpio_configure_pads
void gpio_configure_pads(const struct soc_amd_gpio *gpio_list_ptr, size_t size)
program a particular set of GPIO
Definition:
gpio.c:307
PCH_DEV_LPC
#define PCH_DEV_LPC
Definition:
pci_devs.h:224
src
mainboard
intel
cedarisland_crb
bootblock.c
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