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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <assert.h>
#include <stdint.h>
#include <device/mmio.h>
#include <device/pci_ops.h>
#include <console/console.h>
#include <commonlib/helpers.h>
#include <delay.h>
#include <southbridge/intel/i82801jx/i82801jx.h>
#include <string.h>
#include "raminit.h"
#include "x4x.h"
Go to the source code of this file.
Macros | |
#define | ME_UMA_SIZEMB 0 |
Functions | |
u32 | fsb_to_mhz (u32 speed) |
u32 | ddr_to_mhz (u32 speed) |
static void | program_crossclock (struct sysinfo *s) |
static void | setioclk_dram (struct sysinfo *s) |
static void | launch_dram (struct sysinfo *s) |
static void | write_txdll_tap_pi (u8 ch, u16 reg, u8 tap, u8 pi) |
static void | clkset0 (u8 ch, const struct dll_setting *setting) |
static void | clkset1 (u8 ch, const struct dll_setting *setting) |
static void | ctrlset0 (u8 ch, const struct dll_setting *setting) |
static void | ctrlset1 (u8 ch, const struct dll_setting *setting) |
static void | ctrlset2 (u8 ch, const struct dll_setting *setting) |
static void | ctrlset3 (u8 ch, const struct dll_setting *setting) |
static void | cmdset (u8 ch, const struct dll_setting *setting) |
void | dqsset (u8 ch, u8 lane, const struct dll_setting *setting) |
All finer DQ and DQS DLL settings are set to the same value for each rank in a channel, while coarse is common. More... | |
void | dqset (u8 ch, u8 lane, const struct dll_setting *setting) |
void | rt_set_dqs (u8 channel, u8 lane, u8 rank, struct rt_dqs_setting *dqs_setting) |
static void | program_timings (struct sysinfo *s) |
static void | sync_dll_load_tap (unsigned int tap) |
static bool | sync_dll_test_tap (unsigned int tap, uint32_t val) |
static void | sync_dll_search_tap (unsigned int *tap, uint32_t val) |
static void | program_dll (struct sysinfo *s) |
static void | select_default_dq_dqs_settings (struct sysinfo *s) |
static void | set_all_dq_dqs_dll_settings (struct sysinfo *s) |
static void | prog_rcomp (struct sysinfo *s) |
static void | program_odt (struct sysinfo *s) |
static void | pre_jedec_memory_map (void) |
u32 | test_address (int channel, int rank) |
static u32 | mirror_shift_bit (const u32 data, u8 bit) |
void | send_jedec_cmd (const struct sysinfo *s, u8 r, u8 ch, u8 cmd, u32 val) |
static void | jedec_ddr2 (struct sysinfo *s) |
static void | jedec_ddr3 (struct sysinfo *s) |
static void | sdram_recover_receive_enable (const struct sysinfo *s) |
static void | sdram_program_receive_enable (struct sysinfo *s, int fast_boot) |
static void | set_dradrb (struct sysinfo *s) |
static void | configure_mmap (struct sysinfo *s) |
static void | set_enhanced_mode (struct sysinfo *s) |
static void | power_settings (struct sysinfo *s) |
static void | software_ddr3_reset (struct sysinfo *s) |
void | do_raminit (struct sysinfo *s, int fast_boot) |
Variables | |
const unsigned int | sync_dll_max_taps = 16 |
#define ME_UMA_SIZEMB 0 |
Definition at line 19 of file raminit_ddr23.c.
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Definition at line 255 of file raminit_ddr23.c.
References ch, dll_setting::clk_delay, dll_setting::db_en, dll_setting::db_sel, mchbar_clrsetbits16(), dll_setting::pi, dll_setting::tap, and write_txdll_tap_pi().
Referenced by program_dll().
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Definition at line 264 of file raminit_ddr23.c.
References ch, dll_setting::clk_delay, dll_setting::db_en, dll_setting::db_sel, mchbar_clrsetbits32(), dll_setting::pi, dll_setting::tap, and write_txdll_tap_pi().
Referenced by program_dll().
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Definition at line 319 of file raminit_ddr23.c.
References ch, dll_setting::clk_delay, dll_setting::db_en, dll_setting::db_sel, mchbar_clrsetbits8(), dll_setting::pi, dll_setting::tap, and write_txdll_tap_pi().
Referenced by program_dll().
Definition at line 1648 of file raminit_ddr23.c.
References D0F0_ESMRAMC, HOST_BRIDGE, MAX, ME_UMA_SIZEMB, MIN, pci_read_config16(), pci_update_config8(), pci_write_config16(), pci_write_config32(), and s.
Referenced by do_raminit().
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Definition at line 273 of file raminit_ddr23.c.
References ch, dll_setting::clk_delay, dll_setting::db_en, dll_setting::db_sel, mchbar_clrsetbits32(), dll_setting::pi, dll_setting::tap, and write_txdll_tap_pi().
Referenced by program_dll().
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Definition at line 282 of file raminit_ddr23.c.
References ch, dll_setting::clk_delay, dll_setting::db_en, dll_setting::db_sel, mchbar_clrsetbits32(), dll_setting::pi, dll_setting::tap, and write_txdll_tap_pi().
Referenced by program_dll().
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Definition at line 291 of file raminit_ddr23.c.
References ch, dll_setting::clk_delay, dll_setting::db_en, dll_setting::db_sel, mchbar_clrsetbits32(), dll_setting::pi, dll_setting::tap, and write_txdll_tap_pi().
Referenced by program_dll().
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Definition at line 305 of file raminit_ddr23.c.
References ch, dll_setting::clk_delay, dll_setting::db_en, dll_setting::db_sel, mchbar_clrsetbits32(), dll_setting::pi, dll_setting::tap, and write_txdll_tap_pi().
Referenced by program_dll().
Definition at line 26 of file raminit_ddr23.c.
References ARRAY_SIZE, die(), and mhz.
Referenced by print_selected_timings(), and program_timings().
Definition at line 1932 of file raminit_ddr23.c.
References BIOS_DEBUG, BOOT_PATH_NORMAL, BOOT_PATH_RESUME, BOOT_PATH_WARM_RESET, ch, CHANNEL_IS_POPULATED, CLKCFG_MCHBAR, CLKCFG_MEMCLK_MASK, CLKCFG_MEMCLK_SHIFT, CLKCFG_UPDATE, configure_mmap(), DDR2, DDR3, die(), do_read_training(), do_write_training(), FOR_EACH_CHANNEL, FOR_EACH_POPULATED_CHANNEL, FOR_EACH_POPULATED_RANK, FSB_CLOCK_1066MHz, HOST_BRIDGE, jedec_ddr2(), jedec_ddr3(), launch_dram(), mchbar_clrbits8, mchbar_clrsetbits16(), mchbar_clrsetbits32(), mchbar_clrsetbits8(), mchbar_read8(), mchbar_setbits16, mchbar_setbits32, mchbar_setbits8, mchbar_write16(), mchbar_write32(), mchbar_write8(), ME_UMA_SIZEMB, MEM_CLOCK_667MHz, pci_read_config8(), PMSTS_BOTH_SELFREFRESH, PMSTS_MCHBAR, post_jedec_tab, power_settings(), pre_jedec_memory_map(), printk, prog_rcomp(), program_crossclock(), program_dll(), program_odt(), program_timings(), RANK_IS_POPULATED, read32p(), s, sdram_program_receive_enable(), search_write_leveling(), select_default_dq_dqs_settings(), set_all_dq_dqs_dll_settings(), set_dradrb(), set_enhanced_mode(), setioclk_dram(), software_ddr3_reset(), test_address(), and udelay().
Referenced by sdram_initialize().
void dqset | ( | u8 | ch, |
u8 | lane, | ||
const struct dll_setting * | setting | ||
) |
Definition at line 351 of file raminit_ddr23.c.
References ch, dll_setting::clk_delay, dll_setting::coarse, dll_setting::db_en, dll_setting::db_sel, mchbar_clrsetbits32(), dll_setting::pi, dll_setting::tap, and write_txdll_tap_pi().
Referenced by do_write_training(), find_dq_limit(), search_write_leveling(), and set_all_dq_dqs_dll_settings().
void dqsset | ( | u8 | ch, |
u8 | lane, | ||
const struct dll_setting * | setting | ||
) |
All finer DQ and DQS DLL settings are set to the same value for each rank in a channel, while coarse is common.
Definition at line 332 of file raminit_ddr23.c.
References ch, dll_setting::clk_delay, dll_setting::coarse, dll_setting::db_en, dll_setting::db_sel, mchbar_clrsetbits32(), dll_setting::pi, dll_setting::tap, and write_txdll_tap_pi().
Referenced by set_all_dq_dqs_dll_settings().
Definition at line 21 of file raminit_ddr23.c.
Referenced by print_selected_timings(), and program_timings().
Definition at line 1292 of file raminit_ddr23.c.
References BIOS_DEBUG, CBR_CMD, ch, EMRS1_CMD, EMRS2_CMD, EMRS3_CMD, FOR_EACH_POPULATED_RANK, MRS_CMD, NOP_CMD, PRECHARGE_CMD, printk, RAM_SPEW, s, send_jedec_cmd(), and udelay().
Referenced by do_raminit().
Definition at line 1359 of file raminit_ddr23.c.
References BIOS_DEBUG, ch, ddr3_emrs1_rtt_nom_config, EMRS1_CMD, EMRS2_CMD, EMRS3_CMD, FOR_EACH_POPULATED_RANK, MEM_CLOCK_800MHz, MRS_CMD, NOP_CMD, printk, s, send_jedec_cmd(), udelay(), and ZQCAL_CMD.
Referenced by do_raminit(), and software_ddr3_reset().
Definition at line 155 of file raminit_ddr23.c.
References BOTH_DIMMS_ARE_POPULATED, DDR2, DDR3, die(), FOR_EACH_POPULATED_CHANNEL, mchbar_clrsetbits32(), mchbar_setbits32, mchbar_write32(), MEM_CLOCK_1066MHz, MEM_CLOCK_800MHz, and s.
Referenced by do_raminit().
Definition at line 1254 of file raminit_ddr23.c.
Referenced by send_jedec_cmd().
Definition at line 1779 of file raminit_ddr23.c.
References ch, CHANNEL_IS_POPULATED, DDR2, ddr3_c2_tab, ddr3_c2_x23c, ddr3_c2_x264, FOR_EACH_POPULATED_CHANNEL, FSB_CLOCK_800MHz, HOST_BRIDGE, mchbar_clrbits16, mchbar_clrbits32, mchbar_clrbits8, mchbar_clrsetbits16(), mchbar_clrsetbits32(), mchbar_clrsetbits8(), mchbar_setbits8, mchbar_write16(), mchbar_write32(), mchbar_write8(), MEM_CLOCK_1066MHz, MEM_CLOCK_1333MHz, MEM_CLOCK_667MHz, MEM_CLOCK_800MHz, pci_read_config8(), and s.
Referenced by do_raminit().
Definition at line 1183 of file raminit_ddr23.c.
References C0CKECTRL, C0DRA01, C0DRA23, C0DRB0, C0DRB1, C0DRB2, C0DRB3, C1CKECTRL, C1DRA01, C1DRA23, C1DRB0, C1DRB1, C1DRB2, C1DRB3, D0F0_BGSM, D0F0_GBSM, D0F0_TOLUD, D0F0_TOM, D0F0_TOUUD, D0F0_TSEG, HOST_BRIDGE, mchbar_clrsetbits32(), mchbar_setbits8, mchbar_write16(), mchbar_write32(), mchbar_write8(), pci_write_config16(), pci_write_config32(), and STACKED_MEM.
Referenced by do_raminit().
Definition at line 1018 of file raminit_ddr23.c.
References addr, ARRAY_SIZE, BOTH_DIMMS_ARE_POPULATED, CHANNEL_IS_POPULATED, DDR2, DDR3, FOR_EACH_POPULATED_CHANNEL, mchbar_clrbits32, mchbar_clrsetbits16(), mchbar_clrsetbits32(), mchbar_clrsetbits8(), mchbar_setbits8, mchbar_write16(), and s.
Referenced by do_raminit().
Definition at line 36 of file raminit_ddr23.c.
References DDR3, FSB_CLOCK_1333MHz, mchbar_setbits16, mchbar_setbits8, mchbar_write32(), MEM_CLOCK_800MHz, and s.
Referenced by do_raminit().
Definition at line 690 of file raminit_ddr23.c.
References BIOS_DEBUG, BIOS_NOTICE, BOTH_DIMMS_ARE_POPULATED, CHANNEL_IS_POPULATED, CLKSET0, clkset0(), CLKSET1, clkset1(), CMD, cmdset(), CTRL0, CTRL1, CTRL2, CTRL3, ctrlset0(), ctrlset1(), ctrlset2(), ctrlset3(), DDR2, DDR3, default_ddr2_667_ctrl, default_ddr2_800_ctrl, default_ddr3_1067_ctrl, default_ddr3_1333_ctrl, default_ddr3_800_ctrl, die(), FOR_EACH_CHANNEL, FOR_EACH_POPULATED_CHANNEL, FOR_EACH_POPULATED_RANK_IN_CHANNEL, FOR_EACH_RANK_IN_CHANNEL, FSB_CLOCK_800MHz, mchbar_clrbits16, mchbar_clrbits32, mchbar_clrbits8, mchbar_clrsetbits16(), mchbar_clrsetbits32(), mchbar_clrsetbits8(), mchbar_read8(), mchbar_setbits16, mchbar_setbits8, mchbar_write8(), MEM_CLOCK_1066MHz, MEM_CLOCK_1333MHz, MEM_CLOCK_667MHz, MEM_CLOCK_800MHz, ONLY_DIMMA_IS_POPULATED, ONLY_DIMMB_IS_POPULATED, printk, RANK_IS_POPULATED, s, sync_dll_load_tap(), sync_dll_max_taps, sync_dll_search_tap(), sync_dll_test_tap(), dll_setting::tap, and udelay().
Referenced by do_raminit().
Definition at line 1126 of file raminit_ddr23.c.
References DDR2, FOR_EACH_POPULATED_CHANNEL, mchbar_clrsetbits32(), mchbar_read16(), mchbar_write16(), and s.
Referenced by do_raminit().
Definition at line 386 of file raminit_ddr23.c.
References DDR2, DDR3, ddr_to_mhz(), FOR_EACH_POPULATED_CHANNEL, FOR_EACH_POPULATED_DIMM, fsb_to_mhz(), MAX, mchbar_clrbits32, mchbar_clrbits8, mchbar_clrsetbits16(), mchbar_clrsetbits32(), mchbar_clrsetbits8(), mchbar_read16(), mchbar_read32(), mchbar_read8(), mchbar_setbits8, mchbar_write16(), mchbar_write32(), mchbar_write8(), MEM_CLOCK_1066MHz, MEM_CLOCK_1333MHz, MEM_CLOCK_667MHz, MEM_CLOCK_800MHz, N_BANKS_8, and s.
Referenced by do_raminit().
void rt_set_dqs | ( | u8 | channel, |
u8 | lane, | ||
u8 | rank, | ||
struct rt_dqs_setting * | dqs_setting | ||
) |
Definition at line 369 of file raminit_ddr23.c.
References mchbar_read16(), mchbar_write16(), rt_dqs_setting::pi, printk, RAM_SPEW, and rt_dqs_setting::tap.
Referenced by do_read_training(), rt_find_dqs_limit(), and set_all_dq_dqs_dll_settings().
Definition at line 1439 of file raminit_ddr23.c.
References rcven(), s, and sdram_recover_receive_enable().
Referenced by do_raminit().
Definition at line 1408 of file raminit_ddr23.c.
References FOR_EACH_BYTELANE, FOR_EACH_POPULATED_CHANNEL, mchbar_read32(), mchbar_read8(), mchbar_write16(), mchbar_write32(), mchbar_write8(), and s.
Referenced by sdram_program_receive_enable().
Definition at line 934 of file raminit_ddr23.c.
References ch, DDR2, default_ddr2_667_dq, default_ddr2_667_dqs, default_ddr2_800_dq, default_ddr2_800_dqs, default_ddr3_1067_dq, default_ddr3_1067_dqs, default_ddr3_1333_dq, default_ddr3_1333_dqs, default_ddr3_800_dq, default_ddr3_800_dqs, FOR_EACH_POPULATED_CHANNEL_AND_BYTELANE, MEM_CLOCK_1066MHz, MEM_CLOCK_1333MHz, MEM_CLOCK_667MHz, MEM_CLOCK_800MHz, memcpy(), and s.
Referenced by do_raminit().
Definition at line 1264 of file raminit_ddr23.c.
References addr, ch, DDR3, mchbar_clrsetbits8(), mirror_shift_bit(), NORMALOP_CMD, read32p(), s, test_address(), udelay(), and val.
Referenced by jedec_ddr2(), jedec_ddr3(), search_write_leveling(), and set_rank_write_level().
Definition at line 1002 of file raminit_ddr23.c.
References ch, dqset(), dqsset(), FOR_EACH_BYTELANE, FOR_EACH_POPULATED_CHANNEL, FOR_EACH_RANK_IN_CHANNEL, rt_set_dqs(), and s.
Referenced by do_raminit().
Definition at line 1448 of file raminit_ddr23.c.
References BIOS_DEBUG, ch, DDR3, FOR_EACH_POPULATED_CHANNEL, FOR_EACH_POPULATED_RANK, FOR_EACH_RANK, mchbar_clrbits8, mchbar_clrsetbits8(), mchbar_setbits32, mchbar_setbits8, mchbar_write16(), mchbar_write32(), mchbar_write8(), ME_UMA_SIZEMB, MIN, N_BANKS_8, ONLY_DIMMA_IS_POPULATED, ONLY_DIMMB_IS_POPULATED, printk, RANK_IS_POPULATED, RAW_CARD_UNPOPULATED, s, and STACKED_MEM.
Referenced by do_raminit().
Definition at line 1703 of file raminit_ddr23.c.
References ch, FOR_EACH_POPULATED_CHANNEL, FSB_CLOCK_1066MHz, FSB_CLOCK_1333MHz, FSB_CLOCK_800MHz, HOST_BRIDGE, mchbar_clrbits8, mchbar_clrsetbits32(), mchbar_clrsetbits8(), mchbar_setbits16, mchbar_setbits8, mchbar_write16(), mchbar_write32(), mchbar_write8(), MEM_CLOCK_1066MHz, MEM_CLOCK_800MHz, pci_read_config8(), pci_write_config8(), and s.
Referenced by do_raminit().
Definition at line 127 of file raminit_ddr23.c.
References mchbar_clrbits16, mchbar_clrbits8, mchbar_clrsetbits8(), mchbar_setbits16, mchbar_setbits32, mchbar_setbits8, mchbar_write32(), MEM_CLOCK_1066MHz, MEM_CLOCK_1333MHz, MEM_CLOCK_667MHz, MEM_CLOCK_800MHz, and s.
Referenced by do_raminit().
Definition at line 1914 of file raminit_ddr23.c.
References BIOS_DEBUG, jedec_ddr3(), mchbar_clrbits8, mchbar_clrsetbits8(), mchbar_setbits8, printk, s, and udelay().
Referenced by do_raminit().
Definition at line 668 of file raminit_ddr23.c.
References mchbar_clrsetbits8(), mchbar_read8(), and mchbar_setbits8.
Referenced by program_dll(), and sync_dll_test_tap().
Definition at line 683 of file raminit_ddr23.c.
References sync_dll_max_taps, sync_dll_test_tap(), and val.
Referenced by program_dll().
Definition at line 675 of file raminit_ddr23.c.
References mchbar_read32(), sync_dll_load_tap(), sync_dll_max_taps, and val.
Referenced by program_dll(), and sync_dll_search_tap().
u32 test_address | ( | int | channel, |
int | rank | ||
) |
Definition at line 1245 of file raminit_ddr23.c.
Referenced by do_raminit(), do_read_training(), increment_to_dqs_edge(), rcven(), send_jedec_cmd(), test_dq_aligned(), and test_dqs_aligned().
Definition at line 250 of file raminit_ddr23.c.
References ch, and mchbar_clrsetbits8().
Referenced by clkset0(), clkset1(), cmdset(), ctrlset0(), ctrlset1(), ctrlset2(), ctrlset3(), dqset(), and dqsset().
const unsigned int sync_dll_max_taps = 16 |
Definition at line 666 of file raminit_ddr23.c.
Referenced by program_dll(), sync_dll_search_tap(), and sync_dll_test_tap().