coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
mainboard.c File Reference
#include <device/device.h>
#include <amdblocks/agesawrapper.h>
#include <amdblocks/amd_pci_util.h>
#include <soc/gpio.h>
#include <soc/pci_devs.h>
#include <soc/southbridge.h>
#include "gpio.h"
Include dependency graph for mainboard.c:

Go to the source code of this file.

Functions

static void pirq_setup (void)
 
static void mainboard_init (void *chip_info)
 
static void mainboard_enable (struct device *dev)
 

Variables

static const u8 mainboard_picr_data []
 
static const u8 mainboard_intr_data []
 
static const struct pirq_struct mainboard_pirq_data []
 
struct chip_operations mainboard_ops
 

Function Documentation

◆ mainboard_enable()

static void mainboard_enable ( struct device dev)
static

Definition at line 106 of file mainboard.c.

References pirq_setup().

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◆ mainboard_init()

static void mainboard_init ( void chip_info)
static

Definition at line 95 of file mainboard.c.

References gpio_configure_pads(), and gpio_table.

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◆ pirq_setup()

static void pirq_setup ( void  )
static

Definition at line 87 of file mainboard.c.

References ARRAY_SIZE, intr_data_ptr, mainboard_intr_data, mainboard_picr_data, mainboard_pirq_data, picr_data_ptr, pirq_data_ptr, and pirq_data_size.

Referenced by mainboard_enable().

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Variable Documentation

◆ mainboard_intr_data

const u8 mainboard_intr_data[]
static
Initial value:
= {
[0x00] = 0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
[0x08] = 0x00, 0x00, 0x00, 0x00, 0x1F, 0x1F, 0x1F, 0x1F,
[0x10] = 0x09, 0x1F, 0x1F, 0x10, 0x1F, 0x1F, 0x1F, 0x10,
[0x18] = 0x1F, 0x1F, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00,
[0x20] = 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x00, 0x00,
[0x28] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
[0x30] = 0x12, 0x11, 0x12, 0x11, 0x12, 0x11, 0x12, 0x00,
[0x38] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
[0x40] = 0x11, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
[0x48] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
[0x50] = 0x1F, 0x1F, 0x1F, 0x1F, 0x00, 0x00, 0x00, 0x00,
[0x58] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
[0x60] = 0x1F, 0x1F, 0x07, 0x00, 0x00, 0x00, 0x00, 0x00,
[0x68] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
[0x70] = 0x03, 0x0F, 0x06, 0x0E, 0x0A, 0x0B, 0x1F, 0x1F,
[0x78] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
}

Definition at line 42 of file mainboard.c.

Referenced by pirq_setup().

◆ mainboard_ops

struct chip_operations mainboard_ops
Initial value:
= {
.init = mainboard_init,
.enable_dev = mainboard_enable,
}
static void mainboard_init(void *chip_info)
Definition: mainboard.c:95
static void mainboard_enable(struct device *dev)
Definition: mainboard.c:106

Definition at line 106 of file mainboard.c.

◆ mainboard_picr_data

const u8 mainboard_picr_data[]
static
Initial value:
= {
[0x00] = 0x03, 0x04, 0x05, 0x07, 0x0B, 0x0A, 0x1F, 0x1F,
[0x08] = 0xFA, 0xF1, 0x00, 0x00, 0x1F, 0x1F, 0x1F, 0x1F,
[0x10] = 0x1F, 0x1F, 0x1F, 0x03, 0x1F, 0x1F, 0x1F, 0x1F,
[0x18] = 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
[0x20] = 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x00, 0x00,
[0x28] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
[0x30] = 0x05, 0x04, 0x05, 0x04, 0x04, 0x05, 0x04, 0x05,
[0x38] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
[0x40] = 0x04, 0x1F, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
[0x48] = 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
[0x50] = 0x03, 0x04, 0x05, 0x07, 0x1F, 0x1F, 0x1F, 0x1F,
[0x58] = 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F,
[0x60] = 0x1F, 0x1F, 0x07, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F,
[0x68] = 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F,
[0x70] = 0x03, 0x0F, 0x06, 0x0E, 0x0A, 0x0B, 0x1F, 0x1F,
[0x78] = 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F, 0x1F,
}

Definition at line 23 of file mainboard.c.

Referenced by pirq_setup().

◆ mainboard_pirq_data

const struct pirq_struct mainboard_pirq_data[]
static
Initial value:
= {
}
@ PIRQ_A
Definition: acpi_pirq_gen.h:22
@ PIRQ_C
Definition: acpi_pirq_gen.h:24
@ PIRQ_D
Definition: acpi_pirq_gen.h:25
@ PIRQ_B
Definition: acpi_pirq_gen.h:23
#define SD_DEVFN
Definition: variants.h:11
#define GFX_DEVFN
Definition: pci_devs.h:13
#define PIRQ_SATA
#define PIRQ_SMBUS
#define PIRQ_SD
#define PIRQ_NC
#define SMBUS_DEVFN
Definition: pci_devs.h:117
#define SATA_DEVFN
Definition: pci_devs.h:83
#define PIRQ_XHCI
#define PIRQ_EHCI
#define PIRQ_HDA
#define EHCI1_DEVFN
Definition: pci_devs.h:170
#define PCIE3_DEVFN
Definition: pci_devs.h:69
#define PCIE4_DEVFN
Definition: pci_devs.h:75
#define PCIE2_DEVFN
Definition: pci_devs.h:63
#define PCIE1_DEVFN
Definition: pci_devs.h:57
#define PSP_DEVFN
Definition: pci_devs.h:81
#define PCIE0_DEVFN
Definition: pci_devs.h:51
#define HDA1_DEVFN
Definition: pci_devs.h:87
#define XHCI_DEVFN
Definition: pci_devs.h:153
#define HDA0_DEVFN
Definition: pci_devs.h:39

Definition at line 42 of file mainboard.c.

Referenced by pirq_setup().