coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
romstage.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <arch/stages.h>
4 #include <console/console.h>
5 #include <fmap.h>
6 #include <soc/dramc_param.h>
7 #include <soc/emi.h>
8 #include <soc/mmu_operations.h>
9 #include <soc/mt6358.h>
10 #include <soc/pll.h>
11 #include <soc/rtc.h>
12 
13 #include "early_init.h"
14 
15 /* This must be defined in chromeos.fmd in same name and size. */
16 #define CALIBRATION_REGION "RW_DDR_TRAINING"
17 #define CALIBRATION_REGION_SIZE 0x2000
18 
20  "sizeof(struct dramc_param) exceeds " CALIBRATION_REGION);
21 
22 static bool read_calibration_data_from_flash(struct dramc_param *dparam)
23 {
24  const size_t length = sizeof(*dparam);
25  size_t ret = fmap_read_area(CALIBRATION_REGION, dparam, length);
26  printk(BIOS_DEBUG, "%s: ret=%#lx, length=%#lx\n",
27  __func__, ret, length);
28 
29  return ret == length;
30 }
31 
32 static bool write_calibration_data_to_flash(const struct dramc_param *dparam)
33 {
34  const size_t length = sizeof(*dparam);
35  size_t ret = fmap_overwrite_area(CALIBRATION_REGION, dparam, length);
36  printk(BIOS_DEBUG, "%s: ret=%#lx, length=%#lx\n",
37  __func__, ret, length);
38 
39  return ret == length;
40 }
41 
42 /* dramc_param is ~2K and too large to fit in stack. */
43 static struct dramc_param dramc_parameter;
44 
45 static struct dramc_param_ops dparam_ops = {
47  .read_from_flash = &read_calibration_data_from_flash,
48  .write_to_flash = &write_calibration_data_to_flash,
49 };
50 
52 {
53  /* This will be done in verstage if CONFIG_VBOOT is enabled. */
54  if (!CONFIG(VBOOT))
56 
57  mt6358_init();
58  /* Adjust VSIM2 down to 2.7V because it is shared with IT6505. */
59  pmic_set_vsim2_cali(2700);
62  rtc_boot();
65 }
__weak void platform_romstage_main(void)
Definition: romstage.c:10
#define MHz
Definition: helpers.h:80
void mt_mem_init(struct dramc_param *dparam)
Definition: memory.c:304
#define printk(level,...)
Definition: stdlib.h:16
@ CONFIG
Definition: dsi_common.h:201
ssize_t fmap_overwrite_area(const char *name, const void *buffer, size_t size)
Definition: fmap.c:263
ssize_t fmap_read_area(const char *name, void *buffer, size_t size)
Definition: fmap.c:254
uint64_t length
Definition: fw_cfg_if.h:1
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
Definition: loglevel.h:128
void mainboard_early_init(int s3resume)
Definition: romstage.c:27
_Static_assert(sizeof(struct dramc_param)<=CALIBRATION_REGION_SIZE, "sizeof(struct dramc_param) exceeds " CALIBRATION_REGION)
#define CALIBRATION_REGION
Definition: romstage.c:16
static struct dramc_param dramc_parameter
Definition: romstage.c:43
static bool read_calibration_data_from_flash(struct dramc_param *dparam)
Definition: romstage.c:22
#define CALIBRATION_REGION_SIZE
Definition: romstage.c:17
static struct dramc_param_ops dparam_ops
Definition: romstage.c:45
static bool write_calibration_data_to_flash(const struct dramc_param *dparam)
Definition: romstage.c:32
void mtk_mmu_after_dram(void)
void pmic_set_vsim2_cali(unsigned int vsim2_mv)
Definition: mt6358.c:805
void mt6358_init(void)
Definition: mt6358.c:975
void pmic_init_scp_voltage(void)
Definition: mt6358.c:797
void mt_pll_raise_little_cpu_freq(u32 freq)
Definition: pll.c:420
void rtc_boot(void)
Definition: rtc_mt6359p.c:315
struct dramc_param * param
Definition: dramc_param.h:67