coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
gpio.c
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/* SPDX-License-Identifier: GPL-2.0-or-later */
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#include <baseboard/gpio.h>
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#include <baseboard/variants.h>
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/* Pad configuration in ramstage */
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static
const
struct
pad_config
gpio_table
[] = {
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/* A10 : WWAN_EN */
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PAD_CFG_GPO
(
GPP_A10
, 1, PWROK),
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/* A11 : TOUCH_RPT_EN ==> NC */
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PAD_NC
(
GPP_A11
,
NONE
),
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/* B7 : PCIE_CLKREQ2_N ==> WWAN_SAR_DETECT_ODL*/
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PAD_CFG_GPO
(
GPP_B7
, 1, DEEP),
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/* B8 : WLAN_CLKREQ_ODL ==> NC */
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PAD_NC
(
GPP_B8
,
NONE
),
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/* C18 : AP_I2C_EMR_SDA ==> NC */
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PAD_NC
(
GPP_C18
,
NONE
),
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/* C19 : AP_I2C_EMR_SCL ==> NC */
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PAD_NC
(
GPP_C19
,
NONE
),
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/* D0 : WWAN_HOST_WAKE ==> WWAN_WDISABLE_L */
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PAD_CFG_GPO
(
GPP_D0
, 1, DEEP),
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/* D1 : WLAN_PERST_L ==> NC */
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PAD_NC
(
GPP_D1
,
NONE
),
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/* D3 : WLAN_PCIE_WAKE_ODL ==> NC */
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PAD_NC
(
GPP_D3
,
NONE
),
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/* D4 : TOUCH_INT_ODL ==> NC */
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PAD_NC
(
GPP_D4
,
NONE
),
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/* D5 : TOUCH_RESET_L ==> NC */
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PAD_NC
(
GPP_D5
,
NONE
),
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/* D6 : EN_PP3300_TOUCH_S0 ==> NC */
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PAD_NC
(
GPP_D6
,
NONE
),
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/* D12 : WCAM_RST_L ==> NC */
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PAD_NC
(
GPP_D12
,
NONE
),
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/* D14 : EN_PP1200_CAMERA ==> NC */
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PAD_NC
(
GPP_D14
,
NONE
),
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/* D15 : UCAM_RST_L ==> NC */
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PAD_NC
(
GPP_D15
,
NONE
),
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/* D19 : WWAN_WLAN_COEX1 ==> NC */
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PAD_NC
(
GPP_D19
,
NONE
),
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/* D20 : WWAN_WLAN_COEX2 ==> NC */
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PAD_NC
(
GPP_D20
,
NONE
),
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/* D21 : WWAN_WLAN_COEX3 ==> NC */
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PAD_NC
(
GPP_D21
,
NONE
),
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/* E2 : CLK_24M_WCAM ==> NC */
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PAD_NC
(
GPP_E2
,
NONE
),
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/* H4 : AP_I2C_TS_SDA ==> NC */
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PAD_NC
(
GPP_H4
,
NONE
),
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/* H5 : AP_I2C_TS_SCL ==> NC */
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PAD_NC
(
GPP_H5
,
NONE
),
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/* H6 : AP_I2C_CAM_SDA ==> NC */
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PAD_NC
(
GPP_H6
,
NONE
),
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/* H7 : AP_I2C_CAM_SCL ==> NC */
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PAD_NC
(
GPP_H7
,
NONE
),
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/* H17 : WWAN_RST_L */
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PAD_CFG_GPO
(
GPP_H17
, 0, PLTRST),
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/* S2 : DMIC1_CLK ==> NC */
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PAD_NC
(
GPP_S2
,
NONE
),
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/* S3 : DMIC1_DATA ==> NC */
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PAD_NC
(
GPP_S3
,
NONE
),
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};
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const
struct
pad_config
*
variant_override_gpio_table
(
size_t
*num)
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{
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*num =
ARRAY_SIZE
(
gpio_table
);
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return
gpio_table
;
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}
GPP_D1
#define GPP_D1
Definition:
gpio_soc_defs.h:253
GPP_D14
#define GPP_D14
Definition:
gpio_soc_defs.h:266
GPP_H17
#define GPP_H17
Definition:
gpio_soc_defs.h:233
GPP_D12
#define GPP_D12
Definition:
gpio_soc_defs.h:264
GPP_D6
#define GPP_D6
Definition:
gpio_soc_defs.h:258
GPP_H6
#define GPP_H6
Definition:
gpio_soc_defs.h:222
GPP_H7
#define GPP_H7
Definition:
gpio_soc_defs.h:223
GPP_D5
#define GPP_D5
Definition:
gpio_soc_defs.h:257
GPP_C18
#define GPP_C18
Definition:
gpio_soc_defs.h:555
GPP_S3
#define GPP_S3
Definition:
gpio_soc_defs.h:163
GPP_B8
#define GPP_B8
Definition:
gpio_soc_defs.h:61
GPP_D4
#define GPP_D4
Definition:
gpio_soc_defs.h:256
GPP_E2
#define GPP_E2
Definition:
gpio_soc_defs.h:630
GPP_H5
#define GPP_H5
Definition:
gpio_soc_defs.h:221
GPP_A10
#define GPP_A10
Definition:
gpio_soc_defs.h:129
GPP_D0
#define GPP_D0
Definition:
gpio_soc_defs.h:252
GPP_A11
#define GPP_A11
Definition:
gpio_soc_defs.h:130
GPP_C19
#define GPP_C19
Definition:
gpio_soc_defs.h:556
GPP_S2
#define GPP_S2
Definition:
gpio_soc_defs.h:162
GPP_D19
#define GPP_D19
Definition:
gpio_soc_defs.h:271
GPP_D15
#define GPP_D15
Definition:
gpio_soc_defs.h:267
GPP_H4
#define GPP_H4
Definition:
gpio_soc_defs.h:220
GPP_B7
#define GPP_B7
Definition:
gpio_soc_defs.h:60
GPP_D3
#define GPP_D3
Definition:
gpio_soc_defs.h:255
ARRAY_SIZE
#define ARRAY_SIZE(a)
Definition:
helpers.h:12
GPP_D21
#define GPP_D21
Definition:
gpio_soc_defs.h:131
GPP_D20
#define GPP_D20
Definition:
gpio_soc_defs.h:130
variant_override_gpio_table
const struct pad_config *__weak variant_override_gpio_table(size_t *num)
Definition:
gpio.c:450
gpio_table
static const struct pad_config gpio_table[]
Definition:
gpio.c:7
NONE
@ NONE
Definition:
qup_se_handlers_common.h:196
PAD_NC
#define PAD_NC(pin)
Definition:
gpio_defs.h:263
PAD_CFG_GPO
#define PAD_CFG_GPO(pad, val, rst)
Definition:
gpio_defs.h:247
pad_config
Definition:
gpio.h:75
src
mainboard
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dedede
variants
sasuke
gpio.c
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