gma.c File Reference

#include <arch/io.h>
#include <device/mmio.h>
#include <console/console.h>
#include <delay.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
#include <drivers/intel/gma/i915_reg.h>
#include <drivers/intel/gma/intel_bios.h>
#include <drivers/intel/gma/i915.h>
#include <drivers/intel/gma/opregion.h>
#include <pc80/vga.h>
#include <pc80/vga_io.h>
#include <types.h>
#include "chip.h"
#include "pineview.h"

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Macros
#define	GTTSIZE   (512 * 1024)
#define	PGETBL2_CTL   0x20c4
#define	PGETBL2_1MB   (1 << 8)
#define	PGETBL_CTL   0x2020
#define	PGETBL_1MB   (3 << 1)
#define	PGETBL_512KB   0
#define	PGETBL_ENABLED   0x1
#define	ADPA_HOTPLUG_BITS

Functions
static int	gtt_setup (u8 *mmiobase)
static void	intel_gma_init (const struct northbridge_intel_pineview_config *info, struct device *vga, u8 *mmio, u8 *gtt, u32 physbase, u16 piobase)
static void	gma_func0_init (struct device *dev)
static const char *	gma_acpi_name (const struct device *dev)

Variables
static struct resource *	gtt_res = NULL
static struct resource *	mmio_res = NULL
static struct device_operations	gma_func0_ops
static const unsigned short	pci_device_ids []
static const struct pci_driver gma	__pci_driver

Macro Definition Documentation

ADPA_HOTPLUG_BITS

#define ADPA_HOTPLUG_BITS

Value:

                           (ADPA_CRT_HOTPLUG_PERIOD_128   | \
                           ADPA_CRT_HOTPLUG_WARMUP_10MS  | \
                           ADPA_CRT_HOTPLUG_MONITOR_COLOR| \
                           ADPA_CRT_HOTPLUG_SAMPLE_4S    | \
                           ADPA_CRT_HOTPLUG_VOLTAGE_50   | \
                           ADPA_CRT_HOTPLUG_VOLREF_325MV | \
                           ADPA_CRT_HOTPLUG_ENABLE)

Definition at line 33 of file gma.c.

GTTSIZE

#define GTTSIZE   (512 * 1024)

Definition at line 23 of file gma.c.

PGETBL2_1MB

#define PGETBL2_1MB   (1 << 8)

Definition at line 26 of file gma.c.

PGETBL2_CTL

#define PGETBL2_CTL   0x20c4

Definition at line 25 of file gma.c.

PGETBL_1MB

#define PGETBL_1MB   (3 << 1)

Definition at line 29 of file gma.c.

PGETBL_512KB

#define PGETBL_512KB   0

Definition at line 30 of file gma.c.

PGETBL_CTL

#define PGETBL_CTL   0x2020

Definition at line 28 of file gma.c.

PGETBL_ENABLED

#define PGETBL_ENABLED   0x1

Definition at line 31 of file gma.c.

Function Documentation

gma_acpi_name()

static const char* gma_acpi_name ( const struct device *  dev )

static

Definition at line 262 of file gma.c.

gma_func0_init()

static void gma_func0_init ( struct device *  dev )

static

Definition at line 220 of file gma.c.

References resource::base, BIOS_INFO, BIOS_SPEW, device::chip_info, CONFIG, find_resource(), generate_fake_intel_oprom(), northbridge_intel_pineview_config::gfx, GGC, gtt_res, intel_gma_init(), intel_gma_init_igd_opregion(), mmio_res, PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_1, PCI_BASE_ADDRESS_3, PCI_COMMAND, PCI_COMMAND_MASTER, pci_dev_init(), pci_or_config16(), pci_read_config16(), pci_read_config32(), printk, and res2mmio().

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gtt_setup()

static int gtt_setup ( u8 *  mmiobase )

static

Definition at line 44 of file gma.c.

References BGSM, BIOS_DEBUG, GFX_FLSH_CNTL, pci_read_config32(), pcidev_on_root(), PGETBL_512KB, PGETBL_CTL, printk, udelay(), and write32().

Referenced by intel_gma_init().

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intel_gma_init()

static void intel_gma_init ( const struct northbridge_intel_pineview_config *  info, struct device *  vga, u8 *  mmio, u8 *  gtt, u32  physbase, u16  piobase  )

static

Definition at line 61 of file gma.c.

References ADPA, ADPA_DAC_ENABLE, ADPA_DPMS_ON, ADPA_HOTPLUG_BITS, ADPA_HSYNC_CNTL_ENABLE, ADPA_PIPE_A_SELECT, ADPA_USE_VGA_HVPOLARITY, ADPA_VSYNC_CNTL_ENABLE, ARRAY_SIZE, BIOS_INFO, BIOS_SPEW, CACHE_MODE_0, CACHE_MODE_1, DEIIR, DISPLAY_PLANE_ENABLE, DISPPLANE_BGRX888, DPLL, DPLL_DAC_SERIAL_P2_CLOCK_DIV_10, DPLL_MD, DPLL_VCO_ENABLE, DPLL_VGA_MODE_DIS, DPLLB_MODE_DAC_SERIAL, DSPCLK_GATE_D, DSPCNTR, DSPFW3, EIR, FDI_RX_CTL, FDI_TX_CTL, FW_BLC, FW_BLC2, GGC, gtt_setup(), HBLANK, HSYNC, HTOTAL, IIR, IMR, INSTPM, mdelay(), MI_MODE, outl(), pci_write_config16(), PF_CTL, PF_ENABLE, PF_FILTER_MED_3x3, PF_WIN_POS, PF_WIN_SZ, PFIT_CONTROL, PGETBL2_CTL, PGETBL_CTL, PINEVIEW_SELF_REFRESH_EN, PIPECONF, PIPECONF_BPP_6, PIPECONF_DITHER_EN, PIPECONF_ENABLE, PIPESRC, printk, read32(), SDEIIR, VBLANK, VGA0, VGA1, vga_cr_write(), VGA_DISP_DISABLE, vga_gr_write(), vga_misc_write(), vga_sr_read(), vga_sr_write(), vga_textmode_init(), VGACNTRL, VS_TIMER_DISPATCH, VSYNC, VTOTAL, and write32().

Referenced by gma_func0_init().

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Variable Documentation

__pci_driver

const struct pci_driver gma __pci_driver

static

Initial value:

= {
        .ops     = &gma_func0_ops,
        .vendor  = PCI_VID_INTEL,
        .devices = pci_device_ids,
}

Definition at line 276 of file gma.c.

gma_func0_ops

struct device_operations gma_func0_ops

static

Initial value:

= {
        .read_resources         = pci_dev_read_resources,
        .set_resources          = pci_dev_set_resources,
        .enable_resources       = pci_dev_enable_resources,
        .init                   = gma_func0_init,
        .ops_pci                = &pci_dev_ops_pci,
        .acpi_name              = gma_acpi_name,
}

Definition at line 262 of file gma.c.

gtt_res

struct resource* gtt_res = NULL

static

Definition at line 41 of file gma.c.

Referenced by gma_func0_init().

mmio_res

struct resource* mmio_res = NULL

static

Definition at line 42 of file gma.c.

Referenced by gma_func0_init(), graphics_soc_panel_init(), mtk_pcie_domain_new_res(), and mtk_pcie_set_trans_window().

pci_device_ids

const unsigned short pci_device_ids[]

static

Initial value:

=
{
        0xa001, 0,
}

Definition at line 276 of file gma.c.