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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <soc/usb/snps_usb_phy.h>
#include <soc/addressmap.h>
#include <commonlib/helpers.h>
#include <soc/usb/usb_common.h>
Go to the source code of this file.
Macros | |
#define | SLEEPM BIT(0) |
#define | TERMSEL BIT(5) |
#define | POR BIT(1) |
#define | FSEL_MASK GENMASK(7, 5) |
#define | FSEL_DEFAULT (0x3 << 4) |
#define | VBUSVLDEXTSEL0 BIT(4) |
#define | PLLBTUNE BIT(5) |
#define | VREGBYPASS BIT(0) |
#define | VBUSVLDEXT0 BIT(0) |
#define | USB2_SUSPEND_N BIT(2) |
#define | USB2_SUSPEND_N_SEL BIT(3) |
#define | UTMI_PHY_CMN_CTRL_OVERRIDE_EN BIT(1) |
#define | REFCLK_SEL_MASK GENMASK(1, 0) |
#define | REFCLK_SEL_DEFAULT (0x2 << 0) |
#define | PARAM_OVRD_MASK 0xFF |
Functions | |
void | hs_usb_phy_init (void *board_data) |
Variables | |
struct hs_usb_phy_reg * | hs_phy_reg = (void *)HS_USB_PRIM_PHY_BASE |
#define FSEL_DEFAULT (0x3 << 4) |
Definition at line 15 of file snps_usb_phy.c.
#define FSEL_MASK GENMASK(7, 5) |
Definition at line 14 of file snps_usb_phy.c.
#define PARAM_OVRD_MASK 0xFF |
Definition at line 32 of file snps_usb_phy.c.
#define PLLBTUNE BIT(5) |
Definition at line 18 of file snps_usb_phy.c.
#define POR BIT(1) |
Definition at line 12 of file snps_usb_phy.c.
#define REFCLK_SEL_DEFAULT (0x2 << 0) |
Definition at line 30 of file snps_usb_phy.c.
#define REFCLK_SEL_MASK GENMASK(1, 0) |
Definition at line 29 of file snps_usb_phy.c.
#define SLEEPM BIT(0) |
Definition at line 8 of file snps_usb_phy.c.
#define TERMSEL BIT(5) |
Definition at line 10 of file snps_usb_phy.c.
#define USB2_SUSPEND_N BIT(2) |
Definition at line 24 of file snps_usb_phy.c.
#define USB2_SUSPEND_N_SEL BIT(3) |
Definition at line 25 of file snps_usb_phy.c.
#define UTMI_PHY_CMN_CTRL_OVERRIDE_EN BIT(1) |
Definition at line 27 of file snps_usb_phy.c.
#define VBUSVLDEXT0 BIT(0) |
Definition at line 22 of file snps_usb_phy.c.
#define VBUSVLDEXTSEL0 BIT(4) |
Definition at line 17 of file snps_usb_phy.c.
#define VREGBYPASS BIT(0) |
Definition at line 20 of file snps_usb_phy.c.
Definition at line 36 of file snps_usb_phy.c.
References usb_qusb_phy_pll::analog_controls_two, usb_qusb_phy_pll::bias_ctrl_1, usb_qusb_phy_pll::bias_ctrl_2, BIOS_DEBUG, BIOS_ERR, hs_usb_phy_reg::board_data, hs_usb_phy_reg::cfg0, usb_qusb_phy_pll::clock_inverters, clrbits32, clrsetbits32, usb_qusb_phy_pll::cmode, usb_qusb_phy_dig::debug_ctrl2, DEBUG_CTRL2_MUX_PLL_LOCK_STATUS, usb_qusb_phy_dig::debug_stat5, usb_qusb_phy_pll::dig_tim, FSEL_MASK, hs_usb_phy_reg::hs_phy_ctrl1, hs_usb_phy_reg::hs_phy_ctrl2, hs_usb_phy_reg::hs_phy_ctrl_common0, hs_usb_phy_reg::hs_phy_ctrl_common1, hs_usb_phy_reg::hs_phy_ctrl_common2, hs_usb_phy_reg::hs_phy_override_x0, hs_usb_phy_reg::hs_phy_override_x1, hs_usb_phy_reg::hs_phy_override_x2, hs_usb_phy_reg::hs_phy_override_x3, hs_phy_reg, usb_qusb_phy_pll::lock_delay, PARAM_OVRD_MASK, usb_board_data::parameter_override_x0, usb_board_data::parameter_override_x1, usb_board_data::parameter_override_x2, usb_board_data::parameter_override_x3, hs_usb_phy_reg::phy_dig, hs_usb_phy_reg::phy_pll, PLLBTUNE, POR, POWER_DOWN, printk, usb_qusb_phy_dig::pwr_ctrl1, QUSB2PHY_PLL_ANALOG_CONTROLS_TWO, QUSB2PHY_PLL_BIAS_CONTROL_1, QUSB2PHY_PLL_BIAS_CONTROL_2, QUSB2PHY_PLL_CLOCK_INVERTERS, QUSB2PHY_PLL_CMODE, QUSB2PHY_PLL_DIGITAL_TIMERS_TWO, QUSB2PHY_PLL_LOCK_DELAY, qusb_phy, read32(), hs_usb_phy_reg::refclk_ctrl, REFCLK_SEL_DEFAULT, REFCLK_SEL_MASK, setbits32, SLEEPM, tune_phy(), USB2_SUSPEND_N, USB2_SUSPEND_N_SEL, hs_usb_phy_reg::utmi_ctrl0, hs_usb_phy_reg::utmi_ctrl5, UTMI_PHY_CMN_CTRL_OVERRIDE_EN, VBUSVLDEXT0, VBUSVLDEXTSEL0, VREGBYPASS, VSTATUS_PLL_LOCK_STATUS_MASK, wait_us, and write32().
struct hs_usb_phy_reg* hs_phy_reg = (void *)HS_USB_PRIM_PHY_BASE |
Definition at line 34 of file snps_usb_phy.c.
Referenced by hs_usb_phy_init(), qusb2_phy_override_phy_params(), qusb2_phy_set_tune_param(), and tune_phy().