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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <arch/romstage.h>
#include <console/console.h>
#include <device/mmio.h>
#include <elog.h>
#include <romstage_handoff.h>
#include <security/intel/txt/txt.h>
#include <security/intel/txt/txt_register.h>
#include <northbridge/intel/haswell/haswell.h>
#include <northbridge/intel/haswell/raminit.h>
#include <southbridge/intel/common/pmclib.h>
#include <southbridge/intel/lynxpoint/pch.h>
Go to the source code of this file.
Functions | |
void __weak | mb_late_romstage_setup (void) |
void | mainboard_romstage_entry (void) |
Definition at line 20 of file romstage.c.
References BIOS_DEBUG, CONFIG, early_pch_init(), elog_boot_notify(), enable_usb_bar(), haswell_early_initialization(), haswell_unhide_peg(), intel_txt_log_acm_error(), intel_txt_log_spad(), intel_txt_memory_has_secrets(), intel_txt_romstage_init(), mb_late_romstage_setup(), perform_raminit(), post_code, printk, read32(), report_platform_info(), romstage_handoff_init(), southbridge_detect_s3_resume(), txt_dump_regions(), and TXT_ERROR.
Definition at line 15 of file romstage.c.