coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
romstage.c File Reference
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Functions

void mainboard_config_rcba (void)
 
void mb_late_romstage_setup (void)
 
void mb_get_spd_map (struct spd_info *spdi)
 

Variables

const struct usb2_port_config mainboard_usb2_ports [MAX_USB2_PORTS]
 
const struct usb3_port_config mainboard_usb3_ports [MAX_USB3_PORTS]
 

Function Documentation

◆ mainboard_config_rcba()

void mainboard_config_rcba ( void  )

Definition at line 11 of file romstage.c.

References D20IR, D22IR, D25IR, D26IR, D27IR, D28IR, D29IR, D31IR, DIR_ROUTE, PIRQA, PIRQB, PIRQC, PIRQD, PIRQE, PIRQF, PIRQG, PIRQH, and RCBA16.

◆ mb_get_spd_map()

void mb_get_spd_map ( struct spd_info spdi)

Definition at line 38 of file romstage.c.

◆ mb_late_romstage_setup()

void mb_late_romstage_setup ( void  )

Definition at line 23 of file romstage.c.

References DEVEN, DEVEN_D1F0EN, get_uint_option(), HOST_BRIDGE, pci_and_config32(), pmh7_dgpu_power_enable(), and pmh7_dgpu_power_state().

Referenced by mainboard_romstage_entry().

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Variable Documentation

◆ mainboard_usb2_ports

const struct usb2_port_config mainboard_usb2_ports[MAX_USB2_PORTS]
Initial value:
= {
{ 0x0040, 1, 0, USB_PORT_BACK_PANEL },
{ 0x0040, 1, 0, USB_PORT_BACK_PANEL },
{ 0x0110, 1, 1, USB_PORT_BACK_PANEL },
{ 0x0080, 1, USB_OC_PIN_SKIP, USB_PORT_DOCK },
{ 0x0080, 1, 2, USB_PORT_BACK_PANEL },
{ 0x0040, 1, 3, USB_PORT_BACK_PANEL },
{ 0x0040, 1, 3, USB_PORT_BACK_PANEL },
{ 0x0040, 1, 4, USB_PORT_BACK_PANEL },
{ 0x0110, 1, 4, USB_PORT_BACK_PANEL },
{ 0x0040, 1, 5, USB_PORT_INTERNAL },
{ 0x0040, 1, 5, USB_PORT_BACK_PANEL },
{ 0x0080, 1, 6, USB_PORT_BACK_PANEL },
{ 0x0040, 1, 6, USB_PORT_BACK_PANEL },
}
#define USB_OC_PIN_SKIP
Definition: pei_data.h:27
@ USB_PORT_BACK_PANEL
Definition: pei_data.h:30
@ USB_PORT_DOCK
Definition: pei_data.h:32
@ USB_PORT_INTERNAL
Definition: pei_data.h:35

Definition at line 38 of file romstage.c.

◆ mainboard_usb3_ports

const struct usb3_port_config mainboard_usb3_ports[MAX_USB3_PORTS]
Initial value:
= {
{ 1, 0 },
{ 1, 0 },
{ 1, 1 },
{ 1, 1 },
}

Definition at line 38 of file romstage.c.