coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
gpio.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <baseboard/gpio.h>
4 #include <baseboard/variants.h>
5 #include <types.h>
6 #include <vendorcode/google/chromeos/chromeos.h>
7 
8 /*
9  * Pad configuration in ramstage. The order largely follows the 'GPIO Muxing'
10  * table found in EDS vol 1, but some pins aren't grouped functionally in
11  * the table so those were moved for more logical grouping.
12  */
13 static const struct pad_config gpio_table[] = {
14 /* NORTHWEST COMMUNITY GPIOS */
15  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_0, DN_20K, DEEP, NF1, IGNORE, ENPD), /* TCK */
16  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_1, DN_20K, DEEP, NF1, IGNORE, ENPD), /* TRST_B */
17  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_2, UP_20K, DEEP, NF1, IGNORE, ENPU), /* TMS */
18  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_3, UP_20K, DEEP, NF1, IGNORE, ENPU), /* TDI */
19  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_4, UP_20K, DEEP, NF1, IGNORE, ENPU), /* TDO */
20  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_5, UP_20K, DEEP, NF1, IGNORE, ENPU), /* JTAGX */
21  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_6, UP_20K, DEEP, NF1, IGNORE, ENPU), /* CX_PREQ_B */
22  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_7, UP_20K, DEEP, NF1, IGNORE, ENPU), /* CX_PRDY_B */
23  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_8, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_0_CLK_VNN */
24  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_9, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_0_DATA0_VNN */
25  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_10, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_0_DATA1_VNN */
26  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_11, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_0_DATA2_VNN */
27  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_12, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_0_DATA3_VNN */
28  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_13, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_0_DATA4_VNN */
29  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_14, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_0_DATA5_VNN */
30  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_15, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_0_DATA6_VNN */
31  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_16, DN_20K, DEEP, NF5, HIZCRx0, DISPUPD), /* TRACE_0_DATA7_VNN */
32  PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_17, 1, DEEP, UP_20K, TxDRxE, SAME),/*Ec-to-SOC CS Wake */
33  PAD_CFG_GPI_APIC_IOS(GPIO_18, UP_20K, DEEP, LEVEL, NONE, IGNORE, SAME),/* Touch Pad Interrupt */
34  PAD_CFG_GPI_APIC_IOS(GPIO_19, UP_20K, DEEP, EDGE_SINGLE, NONE, TxDRxE, SAME),/*PMIC Interrupt*/
35  PAD_CFG_GPI_APIC_IOS(GPIO_20, UP_20K, DEEP, LEVEL, INVERT, IGNORE, SAME),/* Audio Codec Interrupt*/
36  PAD_CFG_NF(GPIO_21, UP_20K, DEEP, NF2), /* CNV_MFUART2_RXD */
37  PAD_CFG_NF_IOSSTATE(GPIO_22, UP_20K, DEEP, NF2, TxDRxE), /* CNV_MFUART2_TXD */
38  PAD_CFG_NF(GPIO_23, UP_20K, DEEP, NF2), /* CNV_GNSS_PABLANKIt */
39  PAD_CFG_GPO_GPIO_DRIVER(GPIO_24, 1, DEEP, DN_20K),
40  PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_25, 1, DEEP, UP_20K, TxLASTRxE, SAME),/*WWAN /RF_KILL_GPS*/
41  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_26, UP_20K, DEEP, NF2, HIZCRx1, DISPUPD),/* NFC Interrupt */
42  PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_27, 1, DEEP, NONE, IGNORE, DISPUPD),/* RF_KILL_WiFi/WiFi_Disable */
43  PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_28, 1, DEEP, UP_20K, TxLASTRxE, DISPUPD),/* RF_KILL_BT/BT_Disable */
44  PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_29, 1, DEEP, UP_20K, HIZCRx0, DISPUPD),/* Codec Power Down: Output/ISH_GPIO_3*/
45  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_30, DN_20K, DEEP, NF1), /* ISH_GPIO_4 */
46  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_31, DN_20K, DEEP, NF1), /* ISH_GPIO_5 */
47  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_32, DN_20K, DEEP, NF1), /* ISH_GPIO_6 */
48  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_33, DN_20K, DEEP, NF1), /* ISH_GPIO_7 */
49  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_34, DN_20K, DEEP, NF1), /* ISH_GPIO_8/SUSCLK2 (1.8V) */
50  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_35, UP_20K, DEEP, NF6), /* BSSB_CLK */
51  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_36, UP_20K, DEEP, NF6), /* BSSB_DI */
52  PAD_CFG_GPI_SCI_IOS(GPIO_37, UP_20K, DEEP, EDGE_SINGLE, INVERT, IGNORE, SAME),/*Runtime SCI */
53  PAD_CFG_GPI_SCI_IOS(GPIO_38, UP_20K, DEEP, EDGE_SINGLE, INVERT, IGNORE, SAME),/*Wake SCI */
54  PAD_CFG_GPI_APIC_IOS(GPIO_39, DN_20K, DEEP, LEVEL, NONE, IGNORE, SAME),/* Finger Print Sensor Interrupt (DRDY) */
55  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_40, UP_20K, DEEP, NF6),/*IERR (USB Camera Power Enable)*/
56  PAD_CFG_GPI_SMI_IOS(GPIO_41, UP_20K, DEEP, EDGE_SINGLE, NONE, IGNORE, SAME),/*SOC_EXTSMI_N */
57  PAD_CFG_NF(GPIO_42, DN_20K, DEEP, NF1), /* GP_INTD_DSI_TE1 */
58  PAD_CFG_NF(GPIO_43, DN_20K, DEEP, NF1), /* GP_INTD_DSI_TE2 */
59  PAD_CFG_NF(GPIO_44, UP_20K, DEEP, NF1), /* USB_OC0_B */
60  PAD_CFG_NF(GPIO_45, UP_20K, DEEP, NF1), /* USB_OC1_B */
61  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_46, UP_20K, DEEP, NF1, HIZCRx1, SAME), /* DSI_I2C_SDA */
62  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_47, UP_20K, DEEP, NF1, HIZCRx1, ENPU), /* DSI_I2C_SCL */
63  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_48, UP_1K, DEEP, NF1), /* PMC_I2C_SDA */
64  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_49, UP_1K, DEEP, NF1), /* PMC_I2C_SCL */
65  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_50, UP_2K, DEEP, NF1, HIZCRx1, ENPU), /* LPSS_I2C0_SDA - Audio Codec*/
66  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_51, UP_2K, DEEP, NF1, HIZCRx1, ENPU), /* LPSS_I2C0_SCL - Audio Codec */
67  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_52, UP_20K, DEEP, NF1, HIZCRx1, ENPU), /* LPSS_I2C1_SDA - NFC */
68  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_53, UP_20K, DEEP, NF1, HIZCRx1, ENPU), /* LPSS_I2C1_SCL - NFC */
69  PAD_CFG_GPIO_DRIVER_HI_Z(GPIO_54, UP_20K, DEEP, HIZCRx1, ENPU),/*LPSS_I2C2_SDA*/
70  PAD_CFG_GPIO_DRIVER_HI_Z(GPIO_55, UP_20K, DEEP, HIZCRx1, ENPU),/*LPSS_I2C2_SCL*/
71  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_56, UP_20K, DEEP, NF1, HIZCRx1, ENPU),/* I2C3-SDA - DBG (PSS, SINAI2, MIPI) */
72  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_57, UP_20K, DEEP, NF1, HIZCRx1, ENPU),/*I2C3-SCL - DBG (PSS, SINAI2, MIPI) */
73  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_58, UP_20K, DEEP, NF1, HIZCRx1, ENPU),/*I2C4-SDA - Touch Pad*/
74  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_59, UP_20K, DEEP, NF1, HIZCRx1, ENPU),/*I2C4-SCL - Touch Pad*/
75  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_60, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),/* UART0-RXD - M.2dGNSS */
76  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_61, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),/* UART0-TXD - M.2dGNSS */
77  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_62, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),/* UART0-RTS_B - M.2 dGNSS */
78  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_63, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),/* UART0-CTS_B - M.2 dGNSS */
79  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_64, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),/*LPSS_UART2_RXD*/
80  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_65, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD),/*LPSS_UART2_TXD*/
81  PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_66, 1, DEEP, UP_20K, TxDRxE, DISPUPD),/*RF_KILL_WWAN */
82 #if CONFIG(TPM_ON_FAST_SPI)
83  PAD_CFG_GPI_INT(GPIO_67, UP_20K, DEEP, LEVEL),/*SPI TPM Interrupt */
84 #endif
85  PAD_CFG_NF(GPIO_68, UP_20K, DEEP, NF1),/*PMC_SPI_FS0*/
86  PAD_CFG_GPI_APIC(GPIO_69, DN_20K, DEEP, EDGE_SINGLE, NONE),/*SIM Detect*/
87  PAD_CFG_NF(GPIO_70, DN_20K, DEEP, NF1),/*PMC_SPI_FS2*/
88  PAD_CFG_NF(GPIO_71, DN_20K, DEEP, NF1),/*PMC_SPI_RXD*/
89  PAD_CFG_NF(GPIO_72, DN_20K, DEEP, NF1),/*PMC_SPI_TXD*/
90  PAD_CFG_NF(GPIO_73, DN_20K, DEEP, NF1),/*PMC_SPI_CLK*/
91  PAD_CFG_NF(GPIO_74, DN_20K, DEEP, NF1),/*THERMTRIP_B*/
92  PAD_CFG_NF_IOSSTATE(GPIO_75, UP_20K, DEEP, NF1, HIZCRx1),/*PROCHOT_B*/
93  PAD_CFG_NF_IOSSTATE(GPIO_211, UP_20K, DEEP, NF1, HIZCRx1),/*EMMC_RST_B*/
94  PAD_CFG_GPI_GPIO_DRIVER(GPIO_212, UP_20K, DEEP),/*Touch Panel Int*/
95  PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_213, 1, DEEP, NONE, HIZCRx0, SAME),/*DNX LED - CSE owned*/
96  PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_214, 1, DEEP, NONE, HIZCRx0, SAME),/*LAN Isolate*/
97 /* NORTH COMMUNITY GPIOS */
98  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_76, UP_20K, DEEP, NF1),/*SVID Alert*/
99  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_77, UP_20K, DEEP, NF1),/* SVID Data */
100  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_78, UP_20K, DEEP, NF1),/* SVID Clk */
101  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_79, NATIVE, DEEP, NF1),/* Finger Print Sensor */
102  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_80, NATIVE, DEEP, NF1),/* Finger Print Sensor CS */
103  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_81, NONE, DEEP, NF3),/* FST_SPI_CS2_B - TPM */
104  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_82, NATIVE, DEEP, NF1),/* Finger Print Sensor */
105  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_83, NATIVE, DEEP, NF1),/* Finger Print Sensor */
106  PAD_CFG_NF_IOSSTATE(GPIO_84, NONE, DEEP, NF3, HIZCRx1),/* SPI iTouch*/
107  PAD_CFG_NF_IOSSTATE(GPIO_85, DN_20K, DEEP, NF3, HIZCRx1),/*Function 3: SPI iTouch CS*/
108  PAD_CFG_NF_IOSSTATE(GPIO_86, DN_20K, DEEP, NF3, HIZCRx1),/*Function 3: SPI iTouch*/
109  PAD_CFG_NF_IOSSTATE(GPIO_87, DN_20K, DEEP, NF3, HIZCRx1),/*Function 3: SPI iTouch*/
110  PAD_CFG_NF_IOSSTATE(GPIO_88, DN_20K, DEEP, NF3, HIZCRx1),/*Function 3: SPI iTouch*/
111  PAD_CFG_NF_IOSSTATE(GPIO_89, DN_20K, DEEP, NF3, HIZCRx1),/*Function 3: SPI iTouch*/
112  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_90, NATIVE, DEEP, NF1),/*Function 1: FST SPI Boot Flash CS*/
113  PAD_CFG_GPIO_HI_Z(GPIO_91, NATIVE, DEEP, IGNORE, SAME),/*FST_SPI_CS1_B*/
114  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_92, DN_20K, DEEP, NF1),/*FST_SPI_MOSI_IO0*/
115  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_93, NATIVE, DEEP, NF1),/*FST_SPI_MISO_IO1*/
116  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_94, NATIVE, DEEP, NF1),/*FST_SPI_IO2*/
117  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_95, NATIVE, DEEP, NF1),/*FST_SPI_IO3*/
118  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_96, NATIVE, DEEP, NF1),/*FST_SPI_CLK*/
119  PAD_CFG_NF(GPIO_97, NATIVE, DEEP, NF1),/*FST_SPI_CLK_FB*/
120  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_98, NONE, DEEP, NF1),/*PMU_PLTRST_B*/
121  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_99, UP_20K, DEEP, NF1),/*PMU_PWRBTN_B*/
122  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_100, NONE, DEEP, NF1),/*PMU_SLP_S0_B*/
123  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_101, NONE, DEEP, NF1),/*PMU_SLP_S3_B*/
124  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_102, NONE, DEEP, NF1),/*PMU_SLP_S4_B*/
125  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_103, NONE, DEEP, NF1),/*SUSPWRDNACK*/
126  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_104, UP_20K, DEEP, NF1),/*EMMC_DNX_PWR_EN_B*/
127  PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_105, 0, DEEP, NONE, Tx0RxDCRx0, SAME),/*x4 Slot-2 Reset*/
128  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_106, UP_20K, DEEP, NF1),/*PMU_BATLOW_B*/
129  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_107, UP_20K, DEEP, NF1),/*PMU_RESETBUTTON_B*/
130  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_108, NONE, DEEP, NF1),/*PMU_SUSCLK*/
131  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_109, NONE, DEEP, NF1),/*SUS_STAT_B*/
132  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_110, UP_20K, DEEP, NF2, HIZCRx1, ENPU),/*LPSS_I2C5_SDA*/
133  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_111, UP_20K, DEEP, NF2, HIZCRx1, ENPU),/*LPSS_I2C5_SCL*/
134  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_112, UP_20K, DEEP, NF2, HIZCRx1, ENPU),/*LPSS_I2C6_SDA*/
135  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_113, UP_20K, DEEP, NF2, HIZCRx1, ENPU),/*LPSS_I2C6_SCL*/
136  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_114, UP_20K, DEEP, NF1, HIZCRx1, ENPU),/*LPSS_I2C7_SDA*/
137  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_115, UP_20K, DEEP, NF1, HIZCRx1, ENPU),/*LPSS_I2C7_SCL*/
138  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_116, UP_20K, DEEP, NF1),/*PCIE_WAKE0_B*/
139  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_117, UP_20K, DEEP, NF1),/*PCIE_WAKE1_B*/
140  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_118, UP_20K, DEEP, NF1),/*PCIE_WAKE2_B*/
141  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_119, UP_20K, DEEP, NF1),/*PCIE_WAKE3_B*/
142  PAD_CFG_GPI(GPIO_120, UP_20K, DEEP), /* unused */
143  PAD_CFG_GPI(GPIO_121, UP_20K, DEEP), /* unused */
144  PAD_CFG_GPI(GPIO_122, UP_20K, DEEP), /* unused */
145  PAD_CFG_NF_IOSSTATE(GPIO_123, UP_20K, DEEP, NF1, HIZCRx1),/*PCIE_CLKREQ3_B*/
146  PAD_CFG_NF_IOSSTATE(GPIO_124, UP_20K, DEEP, NF1, HIZCRx0),/*HV_DDI0_DDC_SDA*/
147  PAD_CFG_NF_IOSSTATE(GPIO_125, UP_20K, DEEP, NF1, HIZCRx0),/*HV_DDI0_DDC_SCL*/
148  PAD_CFG_NF_IOSSTATE(GPIO_126, UP_20K, DEEP, NF1, HIZCRx0),/*HV_DDI1_DDC_SDA*/
149  PAD_CFG_NF_IOSSTATE(GPIO_127, UP_20K, DEEP, NF1, HIZCRx0),/*HV_DDI1_DDC_SCL*/
150  PAD_CFG_NF_IOSSTATE(GPIO_128, NONE, DEEP, NF1, Tx0RxDCRx0),/*PANEL0_VDDEN*/
151  PAD_CFG_NF_IOSSTATE(GPIO_129, NONE, DEEP, NF1, Tx0RxDCRx0),/*PANEL0_BKLTEN*/
152  PAD_CFG_NF_IOSSTATE(GPIO_130, NONE, DEEP, NF1, Tx0RxDCRx0),/*PANEL0_BKLTCTL*/
153  PAD_CFG_NF_IOSSTATE(GPIO_131, UP_20K, DEEP, NF1, TxDRxE),/*HV_DDI0_HPD*/
154  PAD_CFG_NF_IOSSTATE(GPIO_132, UP_20K, DEEP, NF1, TxDRxE),/*HV_DDI1_HPD*/
155  PAD_CFG_NF_IOSSTATE(GPIO_133, UP_20K, DEEP, NF1, TxDRxE),/*HV_EDP_HPD*/
156  PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_134, 1, DEEP, UP_20K, IGNORE, SAME),/*Slot-1 Power Enable*/
157  PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_135, 1, DEEP, UP_20K, IGNORE, SAME),/*Slot-2 Power Enable*/
158  PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_136, 1, DEEP, NONE, Tx0RxDCRx0, SAME),/*DGPU Power Select*/
159  PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_137, 1, DEEP, UP_20K, IGNORE, SAME),/*slot-1 Reset*/
160  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_138, UP_20K, DEEP, NF2, HIZCRx1, DISPUPD),/*SATA_GP0 (DC RTD3 need)*/
161  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_139, UP_20K, DEEP, NF2, TxLASTRxE, DISPUPD),/*SATA_GP1 (ZPODD_DEV_DET)*/
162  PAD_CFG_NF(GPIO_140, UP_20K, DEEP, NF5),/*SATA_DEVSLP0 (DC DEV SLP)*/
163  PAD_CFG_NF_IOSSTATE(GPIO_141, UP_20K, DEEP, NF5, HIZCRx1),/*SATA_DEVSLP1 (ZPODD DEV ATN)*/
164  PAD_CFG_NF_IOSSTATE(GPIO_142, UP_20K, DEEP, NF5, HIZCRx1),/*SATA_LED*/
165  PAD_CFG_GPI_APIC_IOS(GPIO_143, NONE, DEEP, LEVEL, NONE, HIZCRx1, SAME),/*DGPU Power Ok*/
166  PAD_CFG_NF_IOSSTATE(GPIO_144, UP_20K, DEEP, NF5, HIZCRx1),/*PANEL1_VDDEN*/
167  PAD_CFG_NF_IOSSTATE(GPIO_145, UP_20K, DEEP, NF5, HIZCRx1),/*PANEL1_BKLTEN*/
168  PAD_CFG_NF_IOSSTATE(GPIO_146, UP_20K, DEEP, NF5, HIZCRx1),/*PANEL1_BKLTCTL*/
169  PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_157, 1, DEEP, UP_20K, IGNORE, SAME),/*WWAN_Reset/dGPS Reset*/
170  PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_158, 0, DEEP, DN_20K, IGNORE, SAME),/*NFC_DFU*/
171  PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_159, 1, DEEP, NONE, Tx0RxDCRx0, SAME),/*NFC reset*/
172  PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_160, 0, DEEP, UP_20K, IGNORE, SAME),/*SD_MODE for spk*/
173  PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_161, 1, DEEP, UP_20K, IGNORE, SAME),/*Touch panel reset*/
174  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_162, DN_20K, DEEP, NF1, HIZCRx1, SAME),/*AVS_I2S1_BCLK*/
175  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_163, DN_20K, DEEP, NF1, HIZCRx1, SAME),/*AVS_I2S1_WS_SYNC*/
176  PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_164, 1, DEEP, NONE, Tx0RxDCRx0, SAME),/*Touch Panel Power Enable*/
177  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_165, DN_20K, DEEP, NF1, HIZCRx1, SAME),/*AVS_I2S1_SDO*/
178 
179 /* AUDIO COMMUNITY GPIOS*/
180 
181  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_166, DN_20K, DEEP, NF2, HIZCRx1, SAME),/*AVS_I2S2_BCLK*/
182  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_167, DN_20K, DEEP, NF2, HIZCRx1, SAME),/*AVS_I2S2_WS_SYNC*/
183  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_168, DN_20K, DEEP, NF2, HIZCRx1, SAME),/* AVS_I2S2_SDI*/
184  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_169, DN_20K, DEEP, NF2, HIZCRx1, SAME),/*AVS_I2S2_SD0*/
185  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_170, DN_20K, DEEP, NF2, HIZCRx1, SAME),/*AVS_I2S1_MCLK*/
186  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_171, DN_20K, DEEP, NF1),/*AVS_M_CLK_A1*/
187  PAD_CFG_NF_IOSSTATE(GPIO_172, DN_20K, DEEP, NF1, HIZCRx1),/*AVS_M_CLK_B1*/
188  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_173, DN_20K, DEEP, NF1),/*AVS_M_DATA_1*/
189  PAD_CFG_NF_IOSSTATE(GPIO_174, DN_20K, DEEP, NF1, HIZCRx1),/*AVS_M_CLK_AB2*/
190  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_175, DN_20K, DEEP, NF1, HIZCRx1, ENPD),/*AVS_M_DATA_2*/
191 
192 /* SCC COMMUNITY GPIOS */
193  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_176, UP_20K, DEEP, NF1),/*SMB_ALERTB*/
194  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_177, UP_20K, DEEP, NF1),/*SMB_CLK*/
195  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_178, UP_20K, DEEP, NF1),/*SMB_DATA*/
196  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_187, DN_20K, DEEP, NF1),/*SDCARD_LVL_WP*/
197  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_179, DN_20K, DEEP, NF1, HIZCRx0, DISPUPD),/*SDCARD_CLK*/
198  PAD_CFG_NF(GPIO_180, DN_20K, DEEP, NF1),/*SDCARD_CLK_FB*/
199  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_181, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),/*SDCARD_D0*/
200  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_182, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),/*SDCARD_D1*/
201  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_183, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),/*SDCARD_D2*/
202  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_184, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),/*SDCARD_D3*/
203  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_185, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),/*SDCARD_CMD*/
204  PAD_CFG_NF(GPIO_186, NONE, DEEP, NF1),/*SDCARD_CD_B*/
205  PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_188, 0, DEEP, NONE, TxDRxE, SAME),/*SD Card*/
206  PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_210, 1, DEEP, UP_20K, HIZCRx0, DISPUPD),
207  PAD_CFG_NF_IOSSTATE(GPIO_189, DN_20K, DEEP, NF1, HIZCRx0),/*OSC_CLK_OUT_0*/
208  PAD_CFG_NF_IOSSTATE(GPIO_190, DN_20K, DEEP, NF1, HIZCRx0),/*OSC_CLK_OUT_1*/
209  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_191, NONE, DEEP, NF1),/*CNV_BRI_DT*/
210  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_192, UP_20K, DEEP, NF1),/*CNV_BRI_RSP*/
211  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_193, NONE, DEEP, NF1),/*CNV_RGI_DT*/
212  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_194, UP_20K, DEEP, NF1),/*CNV_RGI_RSP*/
213  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_195, NONE, DEEP, NF1),/*CNV_RF_RESET_B*/
214  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_196, NONE, DEEP, NF1),/*XTAL_CLKREQ*/
215  PAD_CFG_NF(GPIO_197, DN_20K, DEEP, NF1),/*SDIO_CLK_FB*/
216  PAD_CFG_NF_IOSSTATE(GPIO_198, DN_20K, DEEP, NF1, HIZCRx0),/*EMMC0_CLK*/
217  PAD_CFG_NF(GPIO_199, DN_20K, DEEP, NF1),/*EMMC0_CLK_FB*/
218  PAD_CFG_NF_IOSSTATE(GPIO_200, UP_20K, DEEP, NF1, HIZCRx1),/*EMMC0_D0*/
219  PAD_CFG_NF_IOSSTATE(GPIO_201, UP_20K, DEEP, NF1, HIZCRx1),/*EMMC0_D1*/
220  PAD_CFG_NF_IOSSTATE(GPIO_202, UP_20K, DEEP, NF1, HIZCRx1),/*EMMC0_D2*/
221  PAD_CFG_NF_IOSSTATE(GPIO_203, UP_20K, DEEP, NF1, HIZCRx1),/*EMMC0_D3*/
222  PAD_CFG_NF_IOSSTATE(GPIO_204, UP_20K, DEEP, NF1, HIZCRx1),/*EMMC0_D4*/
223  PAD_CFG_NF_IOSSTATE(GPIO_205, UP_20K, DEEP, NF1, HIZCRx1),/*EMMC0_D5*/
224  PAD_CFG_NF_IOSSTATE(GPIO_206, UP_20K, DEEP, NF1, HIZCRx1),/*EMMC0_D6*/
225  PAD_CFG_NF_IOSSTATE(GPIO_207, UP_20K, DEEP, NF1, HIZCRx1),/*EMMC0_D7*/
226  PAD_CFG_NF_IOSSTATE(GPIO_208, UP_20K, DEEP, NF1, HIZCRx1),/*EMMC0_CMD*/
227  PAD_CFG_NF_IOSSTATE(GPIO_209, DN_20K, DEEP, NF1, HIZCRx0),/*EMMC0_STROBE*/
228 };
229 
230 const struct pad_config * __weak variant_gpio_table(size_t *num)
231 {
232  *num = ARRAY_SIZE(gpio_table);
233  return gpio_table;
234 }
235 
236 /* GPIOs needed prior to ramstage. */
237 static const struct pad_config early_gpio_table[] = {
238  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_177, UP_20K, DEEP, NF1), /* SMB_CLK */
239  PAD_CFG_NF_IOSTANDBY_IGNORE(GPIO_178, UP_20K, DEEP, NF1), /* SMB_DATA */
240  PAD_NC(GPIO_154, NONE), /* LPC_CLKRUNB -- NC for eSPI */
241  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_64, UP_20K, DEEP, NF1, HIZCRx1, DISPUPD),/* LPSS_UART2_RXD */
242  PAD_CFG_NF_IOSSTATE_IOSTERM(GPIO_65, UP_20K, DEEP, NF1, TxLASTRxE, DISPUPD),/* LPSS_UART2_TXD */
243 };
244 
245 const struct pad_config * __weak
247 {
249  return early_gpio_table;
250 }
251 
252 /* GPIO settings before entering sleep. */
253 static const struct pad_config sleep_gpio_table[] = {
254 };
255 
256 const struct pad_config * __weak
258 {
260  return sleep_gpio_table;
261 }
262 
263 static const struct cros_gpio cros_gpios[] = {
264 };
265 
#define GPIO_10
Definition: gpio_ftns.h:12
#define GPIO_191
Definition: gpio_ftns.h:21
#define GPIO_18
Definition: gpio_ftns.h:17
#define GPIO_17
Definition: gpio_ftns.h:16
#define GPIO_16
Definition: gpio_ftns.h:15
#define GPIO_189
Definition: gpio_ftns.h:19
#define GPIO_11
Definition: gpio_ftns.h:13
#define GPIO_190
Definition: gpio_ftns.h:20
#define GPIO_187
Definition: gpio_ftns.h:18
#define GPIO_15
Definition: gpio_ftns.h:14
#define GPIO_51
Definition: gpio_ftns.h:19
#define GPIO_49
Definition: gpio_ftns.h:17
#define GPIO_57
Definition: gpio_ftns.h:21
#define GPIO_50
Definition: gpio_ftns.h:18
#define GPIO_66
Definition: gpio_ftns.h:25
#define GPIO_64
Definition: gpio_ftns.h:24
#define GPIO_71
Definition: gpio_ftns.h:27
#define GPIO_22
Definition: gpio_ftns.h:14
#define GPIO_58
Definition: gpio_ftns.h:22
#define GPIO_59
Definition: gpio_ftns.h:23
#define GPIO_32
Definition: gpio_ftns.h:15
#define GPIO_68
Definition: gpio_ftns.h:26
#define GPIO_55
Definition: gpio_ftns.h:20
#define GPIO_33
Definition: gpio_ftns.h:16
#define ARRAY_SIZE(a)
Definition: helpers.h:12
#define GPIO_195
Definition: gpio_apl.h:153
#define GPIO_82
Definition: gpio_apl.h:187
#define GPIO_37
Definition: gpio_apl.h:102
#define GPIO_202
Definition: gpio_apl.h:160
#define GPIO_34
Definition: gpio_apl.h:99
#define GPIO_214
Definition: gpio_apl.h:172
#define GPIO_178
Definition: gpio_apl.h:300
#define GPIO_183
Definition: gpio_apl.h:303
#define GPIO_161
Definition: gpio_apl.h:282
#define GPIO_48
Definition: gpio_apl.h:113
#define GPIO_213
Definition: gpio_apl.h:171
#define GPIO_169
Definition: gpio_apl.h:290
#define GPIO_201
Definition: gpio_apl.h:159
#define GPIO_210
Definition: gpio_apl.h:251
#define GPIO_127
Definition: gpio_apl.h:227
#define GPIO_207
Definition: gpio_apl.h:275
#define GPIO_165
Definition: gpio_apl.h:286
#define GPIO_41
Definition: gpio_apl.h:106
#define GPIO_173
Definition: gpio_apl.h:295
#define GPIO_197
Definition: gpio_apl.h:155
#define GPIO_175
Definition: gpio_apl.h:297
#define GPIO_206
Definition: gpio_apl.h:274
#define GPIO_209
Definition: gpio_apl.h:250
#define GPIO_83
Definition: gpio_apl.h:188
#define GPIO_198
Definition: gpio_apl.h:156
#define GPIO_208
Definition: gpio_apl.h:276
#define GPIO_203
Definition: gpio_apl.h:161
#define GPIO_164
Definition: gpio_apl.h:285
#define GPIO_168
Definition: gpio_apl.h:289
#define GPIO_111
Definition: gpio_apl.h:211
#define GPIO_46
Definition: gpio_apl.h:111
#define GPIO_44
Definition: gpio_apl.h:109
#define GPIO_199
Definition: gpio_apl.h:157
#define GPIO_159
Definition: gpio_apl.h:280
#define GPIO_43
Definition: gpio_apl.h:108
#define GPIO_128
Definition: gpio_apl.h:228
#define GPIO_158
Definition: gpio_apl.h:279
#define GPIO_182
Definition: gpio_apl.h:302
#define GPIO_110
Definition: gpio_apl.h:210
#define GPIO_174
Definition: gpio_apl.h:296
#define GPIO_167
Definition: gpio_apl.h:288
#define GPIO_45
Definition: gpio_apl.h:110
#define GPIO_186
Definition: gpio_apl.h:301
#define GPIO_125
Definition: gpio_apl.h:225
#define GPIO_47
Definition: gpio_apl.h:112
#define GPIO_123
Definition: gpio_apl.h:221
#define GPIO_171
Definition: gpio_apl.h:292
#define GPIO_166
Definition: gpio_apl.h:287
#define GPIO_194
Definition: gpio_apl.h:152
#define GPIO_62
Definition: gpio_apl.h:115
#define GPIO_73
Definition: gpio_apl.h:126
#define GPIO_177
Definition: gpio_apl.h:299
#define GPIO_172
Definition: gpio_apl.h:293
#define GPIO_193
Definition: gpio_apl.h:151
#define GPIO_204
Definition: gpio_apl.h:162
#define GPIO_211
Definition: gpio_apl.h:252
#define GPIO_200
Definition: gpio_apl.h:158
#define GPIO_63
Definition: gpio_apl.h:116
#define GPIO_205
Definition: gpio_apl.h:273
#define GPIO_196
Definition: gpio_apl.h:154
#define GPIO_162
Definition: gpio_apl.h:283
#define GPIO_163
Definition: gpio_apl.h:284
#define GPIO_160
Definition: gpio_apl.h:281
#define GPIO_188
Definition: gpio_apl.h:146
#define GPIO_192
Definition: gpio_apl.h:150
#define GPIO_212
Definition: gpio_apl.h:253
#define GPIO_112
Definition: gpio_apl.h:212
#define GPIO_170
Definition: gpio_apl.h:291
#define GPIO_176
Definition: gpio_apl.h:298
#define GPIO_36
Definition: gpio_apl.h:101
#define GPIO_35
Definition: gpio_apl.h:100
#define GPIO_28
Definition: gpio_apl.h:93
#define GPIO_179
Definition: gpio_apl.h:294
#define GPIO_124
Definition: gpio_apl.h:224
#define GPIO_94
Definition: gpio_glk.h:117
#define GPIO_60
Definition: gpio_glk.h:74
#define GPIO_53
Definition: gpio_glk.h:67
#define GPIO_56
Definition: gpio_glk.h:70
#define GPIO_184
Definition: gpio_glk.h:217
#define GPIO_181
Definition: gpio_glk.h:214
#define GPIO_54
Definition: gpio_glk.h:68
#define GPIO_52
Definition: gpio_glk.h:66
#define GPIO_180
Definition: gpio_glk.h:213
#define GPIO_185
Definition: gpio_glk.h:218
#define GPIO_61
Definition: gpio_glk.h:75
const struct pad_config * variant_early_gpio_table(size_t *num)
Definition: gpio.c:204
const struct pad_config *__weak variant_gpio_table(size_t *num)
Definition: gpio.c:406
DECLARE_WEAK_CROS_GPIOS(cros_gpios)
const struct pad_config *__weak variant_sleep_gpio_table(size_t *num)
Definition: gpio.c:466
static const struct pad_config gpio_table[]
Definition: gpio.c:13
static const struct pad_config sleep_gpio_table[]
Definition: gpio.c:253
static const struct pad_config early_gpio_table[]
Definition: gpio.c:237
static const struct cros_gpio cros_gpios[]
Definition: gpio.c:263
const struct smm_save_state_ops *legacy_ops __weak
Definition: save_state.c:8
#define GPIO_91
Definition: gpio.h:67
#define GPIO_30
Definition: gpio.h:46
#define GPIO_121
Definition: gpio.h:80
#define GPIO_76
Definition: gpio.h:59
#define GPIO_27
Definition: gpio.h:44
#define GPIO_0
Definition: gpio.h:21
#define GPIO_7
Definition: gpio.h:28
#define GPIO_90
Definition: gpio.h:66
#define GPIO_143
Definition: gpio.h:90
#define GPIO_89
Definition: gpio.h:65
#define GPIO_69
Definition: gpio.h:55
#define GPIO_12
Definition: gpio.h:33
#define GPIO_1
Definition: gpio.h:22
#define GPIO_5
Definition: gpio.h:26
#define GPIO_113
Definition: gpio.h:75
#define GPIO_104
Definition: gpio.h:69
#define GPIO_130
Definition: gpio.h:84
#define GPIO_88
Definition: gpio.h:64
#define GPIO_84
Definition: gpio.h:60
#define GPIO_105
Definition: gpio.h:70
#define GPIO_8
Definition: gpio.h:29
#define GPIO_141
Definition: gpio.h:88
#define GPIO_67
Definition: gpio.h:53
#define GPIO_24
Definition: gpio.h:42
#define GPIO_132
Definition: gpio.h:86
#define GPIO_4
Definition: gpio.h:25
#define GPIO_107
Definition: gpio.h:72
#define GPIO_129
Definition: gpio.h:83
#define GPIO_140
Definition: gpio.h:87
#define GPIO_20
Definition: gpio.h:38
#define GPIO_92
Definition: gpio.h:68
#define GPIO_19
Definition: gpio.h:37
#define GPIO_70
Definition: gpio.h:56
#define GPIO_116
Definition: gpio.h:78
#define GPIO_115
Definition: gpio.h:77
#define GPIO_108
Definition: gpio.h:73
#define GPIO_109
Definition: gpio.h:74
#define GPIO_31
Definition: gpio.h:47
#define GPIO_9
Definition: gpio.h:30
#define GPIO_26
Definition: gpio.h:43
#define GPIO_131
Definition: gpio.h:85
#define GPIO_29
Definition: gpio.h:45
#define GPIO_75
Definition: gpio.h:58
#define GPIO_86
Definition: gpio.h:62
#define GPIO_145
Definition: gpio.h:92
#define GPIO_87
Definition: gpio.h:63
#define GPIO_3
Definition: gpio.h:24
#define GPIO_142
Definition: gpio.h:89
#define GPIO_144
Definition: gpio.h:91
#define GPIO_146
Definition: gpio.h:93
#define GPIO_120
Definition: gpio.h:79
#define GPIO_106
Definition: gpio.h:71
#define GPIO_85
Definition: gpio.h:61
#define GPIO_2
Definition: gpio.h:23
#define GPIO_21
Definition: gpio.h:39
#define GPIO_40
Definition: gpio.h:49
#define GPIO_42
Definition: gpio.h:50
#define GPIO_114
Definition: gpio.h:76
#define GPIO_23
Definition: gpio.h:41
#define GPIO_74
Definition: gpio.h:57
#define GPIO_6
Definition: gpio.h:27
#define PAD_NC(pin)
Definition: gpio_defs.h:263
#define GPIO_139
Definition: gpio.h:94
#define GPIO_14
Definition: gpio.h:35
#define GPIO_136
Definition: gpio.h:91
#define GPIO_137
Definition: gpio.h:92
#define GPIO_138
Definition: gpio.h:93
#define GPIO_103
Definition: gpio.h:71
#define GPIO_13
Definition: gpio.h:34
#define GPIO_135
Definition: gpio.h:90
#define GPIO_79
Definition: gpio.h:66
#define GPIO_81
Definition: gpio.h:68
#define GPIO_77
Definition: gpio.h:64
#define GPIO_39
Definition: gpio.h:52
#define GPIO_157
Definition: gpio.h:107
#define GPIO_80
Definition: gpio.h:67
#define GPIO_154
Definition: gpio.h:104
#define GPIO_38
Definition: gpio.h:51
#define GPIO_78
Definition: gpio.h:65
#define GPIO_72
Definition: gpio.h:58
#define GPIO_133
Definition: gpio.h:97
#define GPIO_99
Definition: gpio.h:76
#define GPIO_25
Definition: gpio.h:43
#define GPIO_95
Definition: gpio.h:72
#define GPIO_117
Definition: gpio.h:84
#define GPIO_96
Definition: gpio.h:73
#define GPIO_93
Definition: gpio.h:71
#define GPIO_126
Definition: gpio.h:90
#define GPIO_98
Definition: gpio.h:75
#define GPIO_102
Definition: gpio.h:79
#define GPIO_122
Definition: gpio.h:89
#define GPIO_134
Definition: gpio.h:98
#define GPIO_97
Definition: gpio.h:74
#define GPIO_65
Definition: gpio.h:51
#define GPIO_100
Definition: gpio.h:77
#define GPIO_119
Definition: gpio.h:86
#define GPIO_118
Definition: gpio.h:85
#define GPIO_101
Definition: gpio.h:78
#define PAD_CFG_GPI_APIC_IOS(pad, pull, rst, trig, inv, iosstate, iosterm)
Definition: gpio_defs.h:391
#define PAD_CFG_GPI(pad, pull, rst)
Definition: gpio_defs.h:284
#define PAD_CFG_NF_IOSSTATE_IOSTERM(pad, pull, rst, func, iosstate, iosterm)
Definition: gpio_defs.h:234
#define PAD_CFG_NF(pad, pull, rst, func)
Definition: gpio_defs.h:197
#define PAD_CFG_NF_IOSSTATE(pad, pull, rst, func, iosstate)
Definition: gpio_defs.h:220
#define PAD_CFG_GPI_INT(pad, pull, rst, trig)
Definition: gpio_defs.h:348
#define PAD_CFG_GPIO_HI_Z(pad, pull, rst, iosstate, iosterm)
Definition: gpio_defs.h:342
#define PAD_CFG_GPO_IOSSTATE_IOSTERM(pad, val, rst, pull, iosstate, ioterm)
Definition: gpio_defs.h:277
#define PAD_CFG_GPI_APIC(pad, pull, rst, trig, inv)
Definition: gpio_defs.h:376
#define PAD_CFG_GPI_SMI_IOS(pad, pull, rst, trig, inv, iosstate, iosterm)
Definition: gpio_defs.h:419
#define PAD_CFG_GPIO_DRIVER_HI_Z(pad, pull, rst, iosstate, iosterm)
Definition: gpio_defs.h:336
#define PAD_CFG_GPI_GPIO_DRIVER(pad, pull, rst)
Definition: gpio_defs.h:323
#define PAD_CFG_GPO_GPIO_DRIVER(pad, val, rst, pull)
Definition: gpio_defs.h:269
#define PAD_CFG_GPI_SCI_IOS(pad, pull, rst, trig, inv, iosstate, iosterm)
Definition: gpio_defs.h:446
#define PAD_CFG_NF_IOSTANDBY_IGNORE(pad, pull, rst, func)
Definition: gpio_defs.h:227