coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
rtc.c File Reference
#include <console/console.h>
#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <security/vboot/vbnv.h>
#include <pc80/mc146818rtc.h>
#include <elog.h>
#include "pmutil.h"
#include "rtc.h"
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Macros

#define __SIMPLE_DEVICE__
 
#define PCH_LPC_DEV   PCI_DEV(0, 0x1f, 0)
 

Functions

int rtc_failure (void)
 
void sb_rtc_init (void)
 
int vbnv_cmos_failed (void)
 

Macro Definition Documentation

◆ __SIMPLE_DEVICE__

#define __SIMPLE_DEVICE__

Definition at line 3 of file rtc.c.

◆ PCH_LPC_DEV

#define PCH_LPC_DEV   PCI_DEV(0, 0x1f, 0)

Definition at line 14 of file rtc.c.

Function Documentation

◆ rtc_failure()

int rtc_failure ( void  )

Definition at line 16 of file rtc.c.

References acpi_get_pm_state(), BIOS_DEBUG, D31F0_GEN_PMCON_3, GEN_PMCON1, chipset_power_state::gen_pmcon1, NULL, PCH_LPC_DEV, pci_read_config8(), PMC_BASE_ADDRESS, printk, read32(), RPS, and RTC_BATTERY_DEAD.

Referenced by sb_rtc_init(), sc_init(), soc_rtc_init(), and vbnv_cmos_failed().

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◆ sb_rtc_init()

void sb_rtc_init ( void  )

Definition at line 21 of file rtc.c.

References BIOS_DEBUG, cmos_init(), CONFIG, D31F0_GEN_PMCON_3, elog_add_event(), ELOG_TYPE_RTC_RESET, PCH_LPC_DEV, pci_update_config8(), printk, RTC_BATTERY_DEAD, rtc_failed(), and rtc_failure().

Referenced by lpc_init().

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◆ vbnv_cmos_failed()

int vbnv_cmos_failed ( void  )

Definition at line 37 of file rtc.c.

References rtc_failure().

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