coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
Macros | Functions
psp_verstage.h File Reference
#include <2crypto.h>
#include <amdblocks/psp_efs.h>
#include <bl_uapp/bl_syscall_public.h>
#include <stdint.h>
#include <soc/psp_transfer.h>
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Macros

#define EMBEDDED_FW_SIGNATURE   0x55aa55aa
 
#define PSP_COOKIE   0x50535024 /* 'PSP$' */
 
#define BHD_COOKIE   0x44484224 /* 'DHB$ */
 
#define PSP_VBOOT_ERROR_SUBCODE   0x0D5D0000
 
#define POSTCODE_ENTERED_PSP_VERSTAGE   0x00
 
#define POSTCODE_CONSOLE_INIT   0x01
 
#define POSTCODE_EARLY_INIT   0x02
 
#define POSTCODE_LATE_INIT   0x03
 
#define POSTCODE_VERSTAGE_MAIN   0x04
 
#define POSTCODE_VERSTAGE_S0I3_RESUME   0x05
 
#define POSTCODE_SAVE_BUFFERS   0x0E
 
#define POSTCODE_UPDATE_BOOT_REGION   0x0F
 
#define POSTCODE_DEFAULT_BUFFER_SIZE_NOTICE   0xC0
 
#define POSTCODE_WORKBUF_RESIZE_WARNING   0xC1
 
#define POSTCODE_WORKBUF_SAVE_ERROR   0xC2
 
#define POSTCODE_WORKBUF_BUFFER_SIZE_ERROR   0xC3
 
#define POSTCODE_ROMSIG_MISMATCH_ERROR   0xC4
 
#define POSTCODE_PSP_COOKIE_MISMATCH_ERROR   0xC5
 
#define POSTCODE_BHD_COOKIE_MISMATCH_ERROR   0xC6
 
#define POSTCODE_UPDATE_PSP_BIOS_DIR_ERROR   0xC7
 
#define POSTCODE_FMAP_REGION_MISSING   0xC8
 
#define POSTCODE_AMD_FW_MISSING   0xC9
 
#define POSTCODE_CMOS_RECOVERY   0xCA
 
#define POSTCODE_EARLY_INIT_ERROR   0xCB
 
#define POSTCODE_INIT_TPM_FAILED   0xCC
 
#define POSTCODE_UNMAP_SPI_ROM   0xF0
 
#define POSTCODE_UNMAP_FCH_DEVICES   0xF1
 
#define POSTCODE_LEAVING_VERSTAGE   0xF2
 
#define SPI_ADDR_MASK   0x00ffffff
 
#define MIN_TRANSFER_BUFFER_SIZE   (8 * KiB)
 
#define MIN_WORKBUF_TRANSFER_SIZE   (MIN_TRANSFER_BUFFER_SIZE - TRANSFER_INFO_SIZE)
 

Functions

void test_svc_calls (void)
 
uint32_t unmap_fch_devices (void)
 
uint32_t verstage_soc_early_init (void)
 
void verstage_mainboard_espi_init (void)
 
void verstage_mainboard_tpm_init (void)
 
void verstage_soc_aoac_init (void)
 
void verstage_soc_espi_init (void)
 
void verstage_soc_i2c_init (void)
 
void verstage_soc_spi_init (void)
 
uintptr_t * map_spi_rom (void)
 
uint32_t update_psp_bios_dir (uint32_t *psp_dir_offset, uint32_t *bios_dir_offset)
 
uint32_t save_uapp_data (void *address, uint32_t size)
 
uint32_t get_bios_dir_addr (struct embedded_firmware *ef_table)
 
int platform_set_sha_op (enum vb2_hash_algorithm hash_alg, struct sha_generic_data *sha_op)
 
void platform_report_mode (int developer_mode_enabled)
 

Macro Definition Documentation

◆ BHD_COOKIE

#define BHD_COOKIE   0x44484224 /* 'DHB$ */

Definition at line 14 of file psp_verstage.h.

◆ EMBEDDED_FW_SIGNATURE

#define EMBEDDED_FW_SIGNATURE   0x55aa55aa

Definition at line 12 of file psp_verstage.h.

◆ MIN_TRANSFER_BUFFER_SIZE

#define MIN_TRANSFER_BUFFER_SIZE   (8 * KiB)

Definition at line 48 of file psp_verstage.h.

◆ MIN_WORKBUF_TRANSFER_SIZE

#define MIN_WORKBUF_TRANSFER_SIZE   (MIN_TRANSFER_BUFFER_SIZE - TRANSFER_INFO_SIZE)

Definition at line 49 of file psp_verstage.h.

◆ POSTCODE_AMD_FW_MISSING

#define POSTCODE_AMD_FW_MISSING   0xC9

Definition at line 37 of file psp_verstage.h.

◆ POSTCODE_BHD_COOKIE_MISMATCH_ERROR

#define POSTCODE_BHD_COOKIE_MISMATCH_ERROR   0xC6

Definition at line 34 of file psp_verstage.h.

◆ POSTCODE_CMOS_RECOVERY

#define POSTCODE_CMOS_RECOVERY   0xCA

Definition at line 38 of file psp_verstage.h.

◆ POSTCODE_CONSOLE_INIT

#define POSTCODE_CONSOLE_INIT   0x01

Definition at line 19 of file psp_verstage.h.

◆ POSTCODE_DEFAULT_BUFFER_SIZE_NOTICE

#define POSTCODE_DEFAULT_BUFFER_SIZE_NOTICE   0xC0

Definition at line 28 of file psp_verstage.h.

◆ POSTCODE_EARLY_INIT

#define POSTCODE_EARLY_INIT   0x02

Definition at line 20 of file psp_verstage.h.

◆ POSTCODE_EARLY_INIT_ERROR

#define POSTCODE_EARLY_INIT_ERROR   0xCB

Definition at line 39 of file psp_verstage.h.

◆ POSTCODE_ENTERED_PSP_VERSTAGE

#define POSTCODE_ENTERED_PSP_VERSTAGE   0x00

Definition at line 18 of file psp_verstage.h.

◆ POSTCODE_FMAP_REGION_MISSING

#define POSTCODE_FMAP_REGION_MISSING   0xC8

Definition at line 36 of file psp_verstage.h.

◆ POSTCODE_INIT_TPM_FAILED

#define POSTCODE_INIT_TPM_FAILED   0xCC

Definition at line 40 of file psp_verstage.h.

◆ POSTCODE_LATE_INIT

#define POSTCODE_LATE_INIT   0x03

Definition at line 21 of file psp_verstage.h.

◆ POSTCODE_LEAVING_VERSTAGE

#define POSTCODE_LEAVING_VERSTAGE   0xF2

Definition at line 45 of file psp_verstage.h.

◆ POSTCODE_PSP_COOKIE_MISMATCH_ERROR

#define POSTCODE_PSP_COOKIE_MISMATCH_ERROR   0xC5

Definition at line 33 of file psp_verstage.h.

◆ POSTCODE_ROMSIG_MISMATCH_ERROR

#define POSTCODE_ROMSIG_MISMATCH_ERROR   0xC4

Definition at line 32 of file psp_verstage.h.

◆ POSTCODE_SAVE_BUFFERS

#define POSTCODE_SAVE_BUFFERS   0x0E

Definition at line 25 of file psp_verstage.h.

◆ POSTCODE_UNMAP_FCH_DEVICES

#define POSTCODE_UNMAP_FCH_DEVICES   0xF1

Definition at line 44 of file psp_verstage.h.

◆ POSTCODE_UNMAP_SPI_ROM

#define POSTCODE_UNMAP_SPI_ROM   0xF0

Definition at line 43 of file psp_verstage.h.

◆ POSTCODE_UPDATE_BOOT_REGION

#define POSTCODE_UPDATE_BOOT_REGION   0x0F

Definition at line 26 of file psp_verstage.h.

◆ POSTCODE_UPDATE_PSP_BIOS_DIR_ERROR

#define POSTCODE_UPDATE_PSP_BIOS_DIR_ERROR   0xC7

Definition at line 35 of file psp_verstage.h.

◆ POSTCODE_VERSTAGE_MAIN

#define POSTCODE_VERSTAGE_MAIN   0x04

Definition at line 22 of file psp_verstage.h.

◆ POSTCODE_VERSTAGE_S0I3_RESUME

#define POSTCODE_VERSTAGE_S0I3_RESUME   0x05

Definition at line 23 of file psp_verstage.h.

◆ POSTCODE_WORKBUF_BUFFER_SIZE_ERROR

#define POSTCODE_WORKBUF_BUFFER_SIZE_ERROR   0xC3

Definition at line 31 of file psp_verstage.h.

◆ POSTCODE_WORKBUF_RESIZE_WARNING

#define POSTCODE_WORKBUF_RESIZE_WARNING   0xC1

Definition at line 29 of file psp_verstage.h.

◆ POSTCODE_WORKBUF_SAVE_ERROR

#define POSTCODE_WORKBUF_SAVE_ERROR   0xC2

Definition at line 30 of file psp_verstage.h.

◆ PSP_COOKIE

#define PSP_COOKIE   0x50535024 /* 'PSP$' */

Definition at line 13 of file psp_verstage.h.

◆ PSP_VBOOT_ERROR_SUBCODE

#define PSP_VBOOT_ERROR_SUBCODE   0x0D5D0000

Definition at line 16 of file psp_verstage.h.

◆ SPI_ADDR_MASK

#define SPI_ADDR_MASK   0x00ffffff

Definition at line 47 of file psp_verstage.h.

Function Documentation

◆ get_bios_dir_addr()

uint32_t get_bios_dir_addr ( struct embedded_firmware *  ef_table)

Definition at line 17 of file chipset.c.

References embedded_firmware::bios1_entry, and embedded_firmware::bios3_entry.

Referenced by update_boot_region().

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◆ map_spi_rom()

uintptr_t* map_spi_rom ( void  )

Definition at line 91 of file fch.c.

References addr, BIOS_DEBUG, NULL, printk, svc_get_spi_rom_info(), and svc_map_spi_rom().

Referenced by boot_device_ro().

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◆ platform_report_mode()

void platform_report_mode ( int  developer_mode_enabled)

Definition at line 37 of file chipset.c.

References BIOS_INFO, printk, svc_set_platform_boot_mode(), and void().

Referenced by Main().

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◆ platform_set_sha_op()

int platform_set_sha_op ( enum vb2_hash_algorithm  hash_alg,
struct sha_generic_data *  sha_op 
)

Definition at line 22 of file chipset.c.

References sha_op.

Referenced by vb2ex_hwcrypto_digest_init().

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◆ save_uapp_data()

uint32_t save_uapp_data ( void *  address,
uint32_t  size 
)

Definition at line 12 of file chipset.c.

References address, and svc_save_uapp_data().

Referenced by save_buffers().

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◆ test_svc_calls()

void test_svc_calls ( void  )

◆ unmap_fch_devices()

uint32_t unmap_fch_devices ( void  )

Definition at line 126 of file fch.c.

References args, ARRAY_SIZE, bar_map, BIOS_ERR, name, NULL, printk, and svc_unmap_fch_dev().

Referenced by Main().

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◆ update_psp_bios_dir()

uint32_t update_psp_bios_dir ( uint32_t *  psp_dir_offset,
uint32_t *  bios_dir_offset 
)

Definition at line 7 of file chipset.c.

References svc_update_psp_bios_dir().

Referenced by update_boot_region().

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◆ verstage_mainboard_espi_init()

void verstage_mainboard_espi_init ( void  )

Definition at line 21 of file verstage.c.

References CONFIG, gpio_configure_pads(), PM_ACPI_CONF, PM_ACPI_S5_LPC_PIN_MODE, PM_ACPI_S5_LPC_PIN_MODE_SEL, PM_ESPI_CS_USE_DATA2, pm_io_read32(), pm_io_write32(), PM_SPI_PAD_PU_PD, and variant_espi_gpio_table().

Referenced by Main().

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◆ verstage_mainboard_tpm_init()

void verstage_mainboard_tpm_init ( void  )

Definition at line 44 of file verstage.c.

References CONFIG, gpio_configure_pads(), and variant_tpm_gpio_table().

Referenced by Main().

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◆ verstage_soc_aoac_init()

void verstage_soc_aoac_init ( void  )

Definition at line 169 of file fch.c.

References BIOS_DEBUG, enable_aoac_devices(), and printk.

Referenced by Main().

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◆ verstage_soc_early_init()

uint32_t verstage_soc_early_init ( void  )

Definition at line 150 of file fch.c.

References map_fch_devices().

Referenced by Main().

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◆ verstage_soc_espi_init()

void verstage_soc_espi_init ( void  )

Definition at line 155 of file fch.c.

References BIOS_DEBUG, CONFIG, espi_setup(), and printk.

Referenced by Main().

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◆ verstage_soc_i2c_init()

void verstage_soc_i2c_init ( void  )

Definition at line 163 of file fch.c.

References BIOS_DEBUG, i2c_soc_early_init(), and printk.

Referenced by Main().

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◆ verstage_soc_spi_init()

void verstage_soc_spi_init ( void  )

Definition at line 175 of file fch.c.

References BIOS_DEBUG, fch_spi_config_modes(), printk, and show_spi_speeds_and_modes().

Referenced by Main().

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