coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
ec.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <arch/io.h>
4 #include <console/console.h>
5 #include <device/device.h>
6 #include <delay.h>
7 
8 #include "ec.h"
9 #include "chip.h"
10 
11 static u16 ec_cmd_reg = 0;
12 static u16 ec_data_reg = 0;
13 
14 static inline u8 __ec_read(u8 addr)
15 {
17  return inb(ec_data_reg);
18 }
19 
20 static inline void __ec_write(u8 addr, u8 data)
21 {
23  outb(data, ec_data_reg);
24 }
25 
26 static int ec_ready(void)
27 {
28  u16 timeout = EC_TIMEOUT;
29 
30  if (!ec_cmd_reg || !ec_data_reg) {
31  printk(BIOS_DEBUG, "Invalid ports: cmd=0x%x data=0x%x\n",
33  return -1;
34  }
35 
36  while (__ec_read(EC_MAILBOX_COMMAND) != 0 && --timeout) {
37  udelay(10);
38  if ((timeout & 0xff) == 0)
39  printk(BIOS_SPEW, ".");
40  }
41  if (!timeout) {
42  printk(BIOS_DEBUG, "Timeout waiting for EC to be ready.\n");
43  return -1;
44  }
45  return 0;
46 }
47 
48 int send_ec_command(u8 command)
49 {
50  if (ec_ready() < 0)
51  return -1;
53  return ec_ready();
54 }
55 
56 int send_ec_command_data(u8 command, u8 data)
57 {
58  if (ec_ready() < 0)
59  return -1;
62  return ec_ready();
63 }
64 
66 {
67  send_ec_command(command);
68  return __ec_read(EC_MAILBOX_DATA);
69 }
70 
72 {
74  return 0;
75  return __ec_read(EC_MAILBOX_DATA);
76 }
77 
78 int ec_write(u8 addr, u8 data)
79 {
80  if (ec_ready() < 0)
81  return -1;
85  return ec_ready();
86 }
87 
88 void ec_set_bit(u8 addr, u8 bit)
89 {
90  ec_write(addr, ec_read(addr) | (1 << bit));
91 }
92 
93 void ec_clr_bit(u8 addr, u8 bit)
94 {
95  ec_write(addr, ec_read(addr) & ~(1 << bit));
96 }
97 
98 void ec_set_ports(u16 cmd_reg, u16 data_reg)
99 {
100  ec_cmd_reg = cmd_reg;
101  ec_data_reg = data_reg;
102 }
103 
104 static void mec1308_enable(struct device *dev)
105 {
106  DEVTREE_CONST struct ec_smsc_mec1308_config *conf = dev->chip_info;
107 
108  if (conf->mailbox_port) {
109  ec_cmd_reg = conf->mailbox_port;
110  ec_data_reg = conf->mailbox_port + 1;
111  }
112 }
113 
115  CHIP_NAME("SMSC MEC1308 EC Mailbox Interface")
116  .enable_dev = mec1308_enable
117 };
static u32 addr
Definition: cirrus.c:14
#define printk(level,...)
Definition: stdlib.h:16
u8 inb(u16 port)
void outb(u8 val, u16 port)
void ec_set_bit(u8 addr, u8 bit)
Definition: ec.c:133
u8 ec_read(u8 addr)
Definition: ec.c:107
void ec_clr_bit(u8 addr, u8 bit)
Definition: ec.c:138
int send_ec_command(u8 command)
Definition: ec.c:13
void ec_set_ports(u16 cmd_reg, u16 data_reg)
Definition: ec.c:143
int ec_write(u8 addr, u8 data)
Definition: ec.c:115
static int ec_ready(void)
Definition: ec.c:26
static u16 ec_cmd_reg
Definition: ec.c:11
static u16 ec_data_reg
Definition: ec.c:12
struct chip_operations ec_smsc_mec1308_ops
Definition: ec.c:114
static u8 __ec_read(u8 addr)
Definition: ec.c:14
u8 read_ec_command_byte(u8 command)
Definition: ec.c:65
int send_ec_command_data(u8 command, u8 data)
Definition: ec.c:56
static void mec1308_enable(struct device *dev)
Definition: ec.c:104
static void __ec_write(u8 addr, u8 data)
Definition: ec.c:20
#define EC_MAILBOX_DATA_H
Definition: ec.h:13
#define EC_MAILBOX_COMMAND
Definition: ec.h:11
#define EC_RAM_READ
Definition: ec.h:14
#define EC_MAILBOX_DATA
Definition: ec.h:12
#define EC_RAM_WRITE
Definition: ec.h:15
#define EC_TIMEOUT
Definition: ec.h:10
#define CHIP_NAME(X)
Definition: device.h:32
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
Definition: loglevel.h:128
#define BIOS_SPEW
BIOS_SPEW - Excessively verbose output.
Definition: loglevel.h:142
#define DEVTREE_CONST
Definition: stddef.h:30
uint16_t u16
Definition: stdint.h:48
uint8_t u8
Definition: stdint.h:45
Definition: device.h:107
DEVTREE_CONST void * chip_info
Definition: device.h:164
void udelay(uint32_t us)
Definition: udelay.c:15