coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
gpio.c
Go to the documentation of this file.
1
/* SPDX-License-Identifier: GPL-2.0-only */
2
3
#include <baseboard/variants.h>
4
#include <
commonlib/helpers.h
>
5
6
/* Pad configuration in ramstage */
7
static
const
struct
pad_config
gpio_table
[] = {
8
/*BT_RF_KILL_N*/
9
PAD_CFG_GPO
(
GPP_E11
, 1, DEEP),
10
11
/*WIFI_RF_KILL_N*/
12
PAD_CFG_GPO
(
GPP_E10
, 1, DEEP),
13
14
/*M.2_WLAN_PERST_N*/
15
PAD_CFG_GPO
(
GPD7
, 1, PLTRST),
16
17
/*M.2_WLAN_SLP*/
18
PAD_CFG_GPO
(
GPD9
, 1, PLTRST),
19
20
/*WIFI_WAKE_N*/
21
PAD_CFG_GPI_SCI
(
GPP_F4
, UP_5K, DEEP, LEVEL, INVERT),
22
23
/*UART_BT_WAKE_N*/
24
PAD_CFG_GPI_SCI
(
GPP_F20
,
NONE
, DEEP, LEVEL, INVERT),
25
26
/*ONBOARD_X4_PCIE_SLOT1_RESET_N*/
27
PAD_CFG_GPO
(
GPD11
, 1, PLTRST),
28
29
/*ONBOARD_X4_PCIE_SLOT1_WAKE_N*/
30
PAD_CFG_GPI_SCI
(
GPP_E2
,
NONE
, DEEP, LEVEL, INVERT),
31
32
/*M.2_WWAN_PWR_EN*/
33
PAD_CFG_GPO
(
GPP_F21
, 1, PLTRST),
34
35
/*M.2_WWAN_RST_N*/
36
PAD_CFG_GPO
(
GPP_V13
, 1, PLTRST),
37
38
/*M.2_WWAN_PE_RST_N*/
39
PAD_CFG_GPO
(
GPP_B14
, 1, PLTRST),
40
41
/*M.2_WWAN_PE_WAKE_N*/
42
PAD_CFG_GPO
(
GPP_B17
, 1, PLTRST),
43
44
/*M.2_WWAN_FCP_OFF_N*/
45
PAD_CFG_GPO
(
GPP_E0
, 1, PLTRST),
46
47
/*M.2_SSD_SATA_DEVSLP_1*/
48
PAD_CFG_NF
(
GPP_E8
,
NONE
, DEEP, NF2),
49
50
/*BC_PROCHOT_N*/
51
PAD_CFG_GPI_SCI
(
GPP_B2
,
NONE
, PLTRST, EDGE_SINGLE, INVERT),
52
53
/*FPS_RST_N*/
54
PAD_CFG_GPO
(
GPP_V14
, 1, PLTRST),
55
56
/*FPS_INT*/
57
PAD_CFG_GPI_APIC
(
GPP_V15
,
NONE
, PLTRST, LEVEL,
NONE
),
58
59
/*CODEC_INT_N*/
60
PAD_CFG_GPI
(
GPP_B15
,
NONE
, PLTRST),
61
62
/*TCH_PNL_PWR_EN*/
63
PAD_CFG_GPO
(
GPP_B16
, 1, PLTRST),
64
65
/*THC0_SPI1_INT_N*/
66
PAD_CFG_GPI_APIC
(
GPP_E17
,
NONE
, PLTRST, LEVEL, INVERT),
67
68
/*SPI_TPM_INT_N*/
69
PAD_CFG_GPI_APIC
(
GPP_G19
,
NONE
, DEEP, LEVEL,
NONE
),
70
71
/*EMMC_CMD*/
72
PAD_CFG_NF
(
GPP_V0
, UP_20K, DEEP, NF1),
73
74
/*EMMC_DATA0*/
75
PAD_CFG_NF
(
GPP_V1
, UP_20K, DEEP, NF1),
76
77
/*EMMC_DATA1*/
78
PAD_CFG_NF
(
GPP_V2
, UP_20K, DEEP, NF1),
79
80
/*EMMC_DATA2*/
81
PAD_CFG_NF
(
GPP_V3
, UP_20K, DEEP, NF1),
82
83
/*EMMC_DATA3*/
84
PAD_CFG_NF
(
GPP_V4
, UP_20K, DEEP, NF1),
85
86
/*EMMC_DATA4*/
87
PAD_CFG_NF
(
GPP_V5
, UP_20K, DEEP, NF1),
88
89
/*EMMC_DATA5*/
90
PAD_CFG_NF
(
GPP_V6
, UP_20K, DEEP, NF1),
91
92
/*EMMC_DATA6*/
93
PAD_CFG_NF
(
GPP_V7
, UP_20K, DEEP, NF1),
94
95
/*EMMC_DATA7*/
96
PAD_CFG_NF
(
GPP_V8
, UP_20K, DEEP, NF1),
97
98
/*EMMC_RCLK*/
99
PAD_CFG_NF
(
GPP_V9
, DN_20K, DEEP, NF1),
100
101
/*EMMC_CLK*/
102
PAD_CFG_NF
(
GPP_V10
, DN_20K, DEEP, NF1),
103
104
/*EMMC_RESET*/
105
PAD_CFG_NF
(
GPP_V11
, UP_20K, DEEP, NF1),
106
107
/*ACPRESENT*/
108
PAD_CFG_NF
(
GPD1
,
NONE
, PLTRST, NF1),
109
110
/*RGMII0_MDC*/
111
PAD_CFG_NF
(
GPP_C3
,
NONE
, DEEP, NF1),
112
113
/*RGMII0_MDIO*/
114
PAD_CFG_NF
(
GPP_C4
,
NONE
, DEEP, NF1),
115
116
/*RGMII0_INT*/
117
PAD_CFG_NF
(
GPP_T4
,
NONE
, DEEP, NF1),
118
119
/*RGMII0_RESETB*/
120
PAD_CFG_GPO
(
GPP_T5
, 1, DEEP),
121
122
/*RGMII0_AUXTS*/
123
PAD_CFG_NF
(
GPP_T6
,
NONE
, DEEP, NF1),
124
125
/*RGMII0_PPS*/
126
PAD_CFG_NF
(
GPP_T7
,
NONE
, DEEP, NF1),
127
128
/*RGMII0_PPS*/
129
PAD_CFG_NF
(
GPP_A0
,
NONE
, DEEP, NF1),
130
131
/*RGMII0_PPS*/
132
PAD_CFG_NF
(
GPP_A1
,
NONE
, DEEP, NF1),
133
134
/*RGMII0_PPS*/
135
PAD_CFG_NF
(
GPP_A2
,
NONE
, DEEP, NF1),
136
137
/*RGMII0_PPS*/
138
PAD_CFG_NF
(
GPP_A3
,
NONE
, DEEP, NF1),
139
140
/*RGMII0_PPS*/
141
PAD_CFG_NF
(
GPP_A4
,
NONE
, DEEP, NF1),
142
143
/*RGMII0_PPS*/
144
PAD_CFG_NF
(
GPP_A5
,
NONE
, DEEP, NF1),
145
146
/*RGMII0_PPS*/
147
PAD_CFG_NF
(
GPP_A6
,
NONE
, DEEP, NF1),
148
149
/*RGMII0_PPS*/
150
PAD_CFG_NF
(
GPP_A7
,
NONE
, DEEP, NF1),
151
152
/*RGMII0_PPS*/
153
PAD_CFG_NF
(
GPP_A8
,
NONE
, DEEP, NF1),
154
155
/*RGMII0_PPS*/
156
PAD_CFG_NF
(
GPP_A9
,
NONE
, DEEP, NF1),
157
158
/*RGMII0_PPS*/
159
PAD_CFG_NF
(
GPP_A10
,
NONE
, DEEP, NF1),
160
161
/*RGMII0_PPS*/
162
PAD_CFG_NF
(
GPP_A23
,
NONE
, DEEP, NF1),
163
164
/*RGMII1_MDC*/
165
PAD_CFG_NF
(
GPP_C6
,
NONE
, DEEP, NF1),
166
167
/*RGMII1_MDIO*/
168
PAD_CFG_NF
(
GPP_C7
,
NONE
, DEEP, NF1),
169
170
/*RGMII1_INT*/
171
PAD_CFG_NF
(
GPP_H0
,
NONE
, DEEP, NF1),
172
173
/*RGMII1_RESETB*/
174
PAD_CFG_GPO
(
GPP_H1
, 1, DEEP),
175
176
/*RGMII1_AUXTS*/
177
PAD_CFG_NF
(
GPP_H2
,
NONE
, DEEP, NF1),
178
179
/*RGMII1_PPS*/
180
PAD_CFG_NF
(
GPP_H3
,
NONE
, DEEP, NF1),
181
182
/*RGMII1_PPS*/
183
PAD_CFG_NF
(
GPP_A11
,
NONE
, DEEP, NF1),
184
185
/*RGMII1_PPS*/
186
PAD_CFG_NF
(
GPP_A12
,
NONE
, DEEP, NF1),
187
188
/*RGMII1_PPS*/
189
PAD_CFG_NF
(
GPP_A13
,
NONE
, DEEP, NF1),
190
191
/*RGMII1_PPS*/
192
PAD_CFG_NF
(
GPP_A14
,
NONE
, DEEP, NF1),
193
194
/*RGMII1_PPS*/
195
PAD_CFG_NF
(
GPP_A15
,
NONE
, DEEP, NF1),
196
197
/*RGMII1_PPS*/
198
PAD_CFG_NF
(
GPP_A16
,
NONE
, DEEP, NF1),
199
200
/*RGMII1_PPS*/
201
PAD_CFG_NF
(
GPP_A17
,
NONE
, DEEP, NF1),
202
203
/*RGMII1_PPS*/
204
PAD_CFG_NF
(
GPP_A18
,
NONE
, DEEP, NF1),
205
206
/*RGMII1_PPS*/
207
PAD_CFG_NF
(
GPP_A19
,
NONE
, DEEP, NF1),
208
209
/*RGMII1_PPS*/
210
PAD_CFG_NF
(
GPP_A20
,
NONE
, DEEP, NF1),
211
212
/*RGMII1_PPS*/
213
PAD_CFG_NF
(
GPP_A21
,
NONE
, DEEP, NF1),
214
215
/*RGMII1_PPS*/
216
PAD_CFG_NF
(
GPP_A22
,
NONE
, DEEP, NF1),
217
218
/*RGMII2_MDC*/
219
PAD_CFG_NF
(
GPP_C17
,
NONE
, DEEP, NF1),
220
221
/*RGMII2_MDIO*/
222
PAD_CFG_NF
(
GPP_C16
,
NONE
, DEEP, NF1),
223
224
/*RGMII2_INT*/
225
PAD_CFG_NF
(
GPP_U0
,
NONE
, DEEP, NF1),
226
227
/*RGMII2_RESETB*/
228
PAD_CFG_GPO
(
GPP_U1
, 1, DEEP),
229
};
230
231
/* Early pad configuration in bootblock */
232
static
const
struct
pad_config
early_gpio_table
[] = {
233
/* UART1 RX */
234
PAD_CFG_NF
(
GPP_C12
,
NONE
, DEEP, NF4),
235
236
/* UART1 TX */
237
PAD_CFG_NF
(
GPP_C13
,
NONE
, DEEP, NF4),
238
239
/* UART2 RX */
240
PAD_CFG_NF
(
GPP_C20
,
NONE
, DEEP, NF4),
241
242
/* UART2 TX */
243
PAD_CFG_NF
(
GPP_C21
,
NONE
, DEEP, NF4),
244
245
/*WWAN_FCP_OFF_N*/
246
PAD_CFG_GPO
(
GPP_E0
, 1, PLTRST),
247
248
/*WWAN_PWREN*/
249
PAD_CFG_GPO
(
GPP_F21
, 1, PLTRST),
250
251
/*WWAN_PERST_N*/
252
PAD_CFG_GPO
(
GPP_B14
, 0, PLTRST),
253
254
/*WWAN_RST_N*/
255
PAD_CFG_GPO
(
GPP_V13
, 0, PLTRST),
256
257
/* LAN_WAKEB*/
258
PAD_CFG_GPI_SCI
(
GPD2
,
NONE
, DEEP, EDGE_SINGLE, INVERT),
259
260
/*WWAN_RST_N*/
261
PAD_CFG_GPO
(
GPP_V13
, 0, PWROK),
262
263
/*WWAN_PERST_N*/
264
PAD_CFG_GPO
(
GPP_B14
, 0, PWROK),
265
266
/*WWAN_FCP_OFF_N*/
267
PAD_CFG_GPO
(
GPP_E0
, 0, PWROK),
268
};
269
270
const
struct
pad_config
*
variant_gpio_table
(
size_t
*num)
271
{
272
*num =
ARRAY_SIZE
(
gpio_table
);
273
return
gpio_table
;
274
}
275
276
const
struct
pad_config
*
variant_early_gpio_table
(
size_t
*num)
277
{
278
*num =
ARRAY_SIZE
(
early_gpio_table
);
279
return
early_gpio_table
;
280
}
GPD11
#define GPD11
Definition:
gpio_soc_defs.h:392
GPP_T7
#define GPP_T7
Definition:
gpio_soc_defs.h:98
GPP_A4
#define GPP_A4
Definition:
gpio_soc_defs.h:123
GPD9
#define GPD9
Definition:
gpio_soc_defs.h:390
GPP_A18
#define GPP_A18
Definition:
gpio_soc_defs.h:137
GPP_F21
#define GPP_F21
Definition:
gpio_soc_defs.h:594
GPP_C12
#define GPP_C12
Definition:
gpio_soc_defs.h:549
GPP_E0
#define GPP_E0
Definition:
gpio_soc_defs.h:628
GPP_F20
#define GPP_F20
Definition:
gpio_soc_defs.h:593
GPP_A14
#define GPP_A14
Definition:
gpio_soc_defs.h:133
GPP_B16
#define GPP_B16
Definition:
gpio_soc_defs.h:69
GPP_A5
#define GPP_A5
Definition:
gpio_soc_defs.h:124
GPP_B2
#define GPP_B2
Definition:
gpio_soc_defs.h:55
GPP_A19
#define GPP_A19
Definition:
gpio_soc_defs.h:138
GPP_H2
#define GPP_H2
Definition:
gpio_soc_defs.h:218
GPP_B15
#define GPP_B15
Definition:
gpio_soc_defs.h:68
GPP_A2
#define GPP_A2
Definition:
gpio_soc_defs.h:121
GPP_A6
#define GPP_A6
Definition:
gpio_soc_defs.h:125
GPP_H1
#define GPP_H1
Definition:
gpio_soc_defs.h:217
GPP_A23
#define GPP_A23
Definition:
gpio_soc_defs.h:142
GPP_C13
#define GPP_C13
Definition:
gpio_soc_defs.h:550
GPP_C17
#define GPP_C17
Definition:
gpio_soc_defs.h:554
GPP_E8
#define GPP_E8
Definition:
gpio_soc_defs.h:636
GPP_A7
#define GPP_A7
Definition:
gpio_soc_defs.h:126
GPP_A0
#define GPP_A0
Definition:
gpio_soc_defs.h:119
GPD7
#define GPD7
Definition:
gpio_soc_defs.h:388
GPP_C20
#define GPP_C20
Definition:
gpio_soc_defs.h:557
GPP_A20
#define GPP_A20
Definition:
gpio_soc_defs.h:139
GPP_A16
#define GPP_A16
Definition:
gpio_soc_defs.h:135
GPP_A12
#define GPP_A12
Definition:
gpio_soc_defs.h:131
GPP_C6
#define GPP_C6
Definition:
gpio_soc_defs.h:543
GPD2
#define GPD2
Definition:
gpio_soc_defs.h:383
GPP_A3
#define GPP_A3
Definition:
gpio_soc_defs.h:122
GPP_C16
#define GPP_C16
Definition:
gpio_soc_defs.h:553
GPD1
#define GPD1
Definition:
gpio_soc_defs.h:382
GPP_C4
#define GPP_C4
Definition:
gpio_soc_defs.h:541
GPP_T4
#define GPP_T4
Definition:
gpio_soc_defs.h:95
GPP_E17
#define GPP_E17
Definition:
gpio_soc_defs.h:645
GPP_E2
#define GPP_E2
Definition:
gpio_soc_defs.h:630
GPP_H0
#define GPP_H0
Definition:
gpio_soc_defs.h:215
GPP_C21
#define GPP_C21
Definition:
gpio_soc_defs.h:558
GPP_H3
#define GPP_H3
Definition:
gpio_soc_defs.h:219
GPP_F4
#define GPP_F4
Definition:
gpio_soc_defs.h:577
GPP_A10
#define GPP_A10
Definition:
gpio_soc_defs.h:129
GPP_A8
#define GPP_A8
Definition:
gpio_soc_defs.h:127
GPP_A1
#define GPP_A1
Definition:
gpio_soc_defs.h:120
GPP_B14
#define GPP_B14
Definition:
gpio_soc_defs.h:67
GPP_A11
#define GPP_A11
Definition:
gpio_soc_defs.h:130
GPP_A15
#define GPP_A15
Definition:
gpio_soc_defs.h:134
GPP_A9
#define GPP_A9
Definition:
gpio_soc_defs.h:128
GPP_E10
#define GPP_E10
Definition:
gpio_soc_defs.h:638
GPP_A13
#define GPP_A13
Definition:
gpio_soc_defs.h:132
GPP_A21
#define GPP_A21
Definition:
gpio_soc_defs.h:140
GPP_E11
#define GPP_E11
Definition:
gpio_soc_defs.h:639
GPP_T6
#define GPP_T6
Definition:
gpio_soc_defs.h:97
GPP_T5
#define GPP_T5
Definition:
gpio_soc_defs.h:96
GPP_A22
#define GPP_A22
Definition:
gpio_soc_defs.h:141
GPP_C3
#define GPP_C3
Definition:
gpio_soc_defs.h:540
GPP_A17
#define GPP_A17
Definition:
gpio_soc_defs.h:136
GPP_B17
#define GPP_B17
Definition:
gpio_soc_defs.h:70
GPP_C7
#define GPP_C7
Definition:
gpio_soc_defs.h:544
ARRAY_SIZE
#define ARRAY_SIZE(a)
Definition:
helpers.h:12
GPP_V5
#define GPP_V5
Definition:
gpio_soc_defs.h:118
GPP_V0
#define GPP_V0
Definition:
gpio_soc_defs.h:113
GPP_U1
#define GPP_U1
Definition:
gpio_soc_defs.h:181
GPP_V2
#define GPP_V2
Definition:
gpio_soc_defs.h:115
GPP_U0
#define GPP_U0
Definition:
gpio_soc_defs.h:180
GPP_V4
#define GPP_V4
Definition:
gpio_soc_defs.h:117
GPP_V1
#define GPP_V1
Definition:
gpio_soc_defs.h:114
GPP_V14
#define GPP_V14
Definition:
gpio_soc_defs.h:127
GPP_G19
#define GPP_G19
Definition:
gpio_soc_defs.h:101
GPP_V15
#define GPP_V15
Definition:
gpio_soc_defs.h:128
GPP_V11
#define GPP_V11
Definition:
gpio_soc_defs.h:124
GPP_V10
#define GPP_V10
Definition:
gpio_soc_defs.h:123
GPP_V3
#define GPP_V3
Definition:
gpio_soc_defs.h:116
GPP_V8
#define GPP_V8
Definition:
gpio_soc_defs.h:121
GPP_V9
#define GPP_V9
Definition:
gpio_soc_defs.h:122
GPP_V13
#define GPP_V13
Definition:
gpio_soc_defs.h:126
GPP_V7
#define GPP_V7
Definition:
gpio_soc_defs.h:120
GPP_V6
#define GPP_V6
Definition:
gpio_soc_defs.h:119
helpers.h
variant_early_gpio_table
const struct pad_config * variant_early_gpio_table(size_t *num)
Definition:
gpio.c:204
variant_gpio_table
const struct pad_config *__weak variant_gpio_table(size_t *num)
Definition:
gpio.c:406
gpio_table
static const struct pad_config gpio_table[]
Definition:
gpio.c:7
early_gpio_table
static const struct pad_config early_gpio_table[]
Definition:
gpio.c:232
NONE
@ NONE
Definition:
qup_se_handlers_common.h:196
PAD_CFG_GPI
#define PAD_CFG_GPI(pad, pull, rst)
Definition:
gpio_defs.h:284
PAD_CFG_NF
#define PAD_CFG_NF(pad, pull, rst, func)
Definition:
gpio_defs.h:197
PAD_CFG_GPI_APIC
#define PAD_CFG_GPI_APIC(pad, pull, rst, trig, inv)
Definition:
gpio_defs.h:376
PAD_CFG_GPO
#define PAD_CFG_GPO(pad, val, rst)
Definition:
gpio_defs.h:247
PAD_CFG_GPI_SCI
#define PAD_CFG_GPI_SCI(pad, pull, rst, trig, inv)
Definition:
gpio_defs.h:432
pad_config
Definition:
gpio.h:75
src
mainboard
intel
elkhartlake_crb
variants
ehlcrb
gpio.c
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