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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <cbmem.h>
#include <commonlib/helpers.h>
#include <console/console.h>
#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <stdint.h>
#include <device/device.h>
#include <boot/tables.h>
#include <acpi/acpi.h>
#include <cpu/intel/smm_reloc.h>
#include "chip.h"
#include "gm45.h"
Go to the source code of this file.
Functions | |
static void | mch_domain_read_resources (struct device *dev) |
static void | mch_domain_set_resources (struct device *dev) |
static void | mch_domain_init (struct device *dev) |
static const char * | northbridge_acpi_name (const struct device *dev) |
void | northbridge_write_smram (u8 smram) |
static void | enable_dev (struct device *dev) |
static void | gm45_init (void *const chip_info) |
Variables | |
static struct device_operations | pci_domain_ops |
static struct device_operations | cpu_bus_ops |
struct chip_operations | northbridge_intel_gm45_ops |
Definition at line 195 of file northbridge.c.
References cpu_bus_ops, DEVICE_PATH_CPU_CLUSTER, DEVICE_PATH_DOMAIN, device::ops, device::path, pci_domain_ops, and device_path::type.
Definition at line 205 of file northbridge.c.
References D0F0_DEVEN, device::enabled, pci_read_config32(), pci_write_config32(), and pcidev_on_root().
Definition at line 145 of file northbridge.c.
References PCI_COMMAND, PCI_COMMAND_SERR, pci_or_config16(), and pcidev_on_root().
Definition at line 17 of file northbridge.c.
References BIOS_DEBUG, BIOS_INFO, cbmem_top(), D0F0_ESMRAMC, D0F0_GGC, D0F0_TOLUD, D0F0_TOM, D0F0_TOUUD, decode_igd_gtt_size(), decode_igd_memory_size(), decode_tseg_size(), fixed_mem_resource(), IORESOURCE_RESERVE, KiB, MiB, mmconf_resource(), mmio_resource, pci_domain_read_resources(), pci_read_config16(), pci_read_config8(), pcidev_on_root(), printk, ram_resource, and reserved_ram_resource.
Definition at line 130 of file northbridge.c.
References assign_resources(), device::link_list, probe_resource(), and report_resource_stored().
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Definition at line 153 of file northbridge.c.
References device::bus, pci_path::devfn, DEVICE_PATH_DOMAIN, DEVICE_PATH_PCI, NULL, device::path, device_path::pci, PCI_DEVFN, bus::secondary, and device_path::type.
Definition at line 169 of file northbridge.c.
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Definition at line 169 of file northbridge.c.
Referenced by enable_dev().
struct chip_operations northbridge_intel_gm45_ops |
Definition at line 205 of file northbridge.c.
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Definition at line 169 of file northbridge.c.
Referenced by enable_dev().