coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
northbridge.c File Reference
#include <arch/hpet.h>
#include <cbmem.h>
#include <console/console.h>
#include <commonlib/bsd/helpers.h>
#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <stdint.h>
#include <device/device.h>
#include <boot/tables.h>
#include <acpi/acpi.h>
#include <northbridge/intel/pineview/pineview.h>
#include <cpu/intel/smm_reloc.h>
Include dependency graph for northbridge.c:

Go to the source code of this file.

Functions

static void add_fixed_resources (struct device *dev, int index)
 
static void mch_domain_read_resources (struct device *dev)
 
void northbridge_write_smram (u8 smram)
 
static void mch_domain_set_resources (struct device *dev)
 
static void mch_domain_init (struct device *dev)
 
static const char * northbridge_acpi_name (const struct device *dev)
 
static void enable_dev (struct device *dev)
 

Variables

static const int legacy_hole_base_k = 0xa0000 / KiB
 
static struct device_operations pci_domain_ops
 
static struct device_operations cpu_bus_ops
 
struct chip_operations northbridge_intel_pineview_ops
 

Function Documentation

◆ add_fixed_resources()

static void add_fixed_resources ( struct device dev,
int  index 
)
static

◆ enable_dev()

static void enable_dev ( struct device dev)
static

◆ mch_domain_init()

static void mch_domain_init ( struct device dev)
static

Definition at line 144 of file northbridge.c.

References PCI_COMMAND, PCI_COMMAND_SERR, and pci_or_config16().

Here is the call graph for this function:

◆ mch_domain_read_resources()

◆ mch_domain_set_resources()

static void mch_domain_set_resources ( struct device dev)
static

Definition at line 134 of file northbridge.c.

References assign_resources(), device::link_list, resource::next, report_resource_stored(), and device::resource_list.

Here is the call graph for this function:

◆ northbridge_acpi_name()

static const char* northbridge_acpi_name ( const struct device dev)
static

Definition at line 150 of file northbridge.c.

◆ northbridge_write_smram()

void northbridge_write_smram ( u8  smram)

Definition at line 124 of file northbridge.c.

References die(), NULL, pci_write_config8(), pcidev_on_root(), and SMRAM.

Here is the call graph for this function:

Variable Documentation

◆ cpu_bus_ops

struct device_operations cpu_bus_ops
static
Initial value:
= {
.read_resources = noop_read_resources,
.set_resources = noop_set_resources,
.init = mp_cpu_bus_init,
}
static void noop_read_resources(struct device *dev)
Standard device operations function pointers shims.
Definition: device.h:73
static void noop_set_resources(struct device *dev)
Definition: device.h:74
static void mp_cpu_bus_init(struct device *dev)
Definition: device.h:240

Definition at line 150 of file northbridge.c.

Referenced by enable_dev().

◆ legacy_hole_base_k

const int legacy_hole_base_k = 0xa0000 / KiB
static

Definition at line 23 of file northbridge.c.

Referenced by add_fixed_resources().

◆ northbridge_intel_pineview_ops

struct chip_operations northbridge_intel_pineview_ops
Initial value:
= {
.enable_dev = enable_dev,
}
static void enable_dev(struct device *dev)
Definition: northbridge.c:181

Definition at line 181 of file northbridge.c.

◆ pci_domain_ops

struct device_operations pci_domain_ops
static
Initial value:
= {
.read_resources = mch_domain_read_resources,
.set_resources = mch_domain_set_resources,
.init = mch_domain_init,
.scan_bus = pci_domain_scan_bus,
.acpi_fill_ssdt = generate_cpu_entries,
.acpi_name = northbridge_acpi_name,
}
void generate_cpu_entries(const struct device *device)
Definition: acpi.c:334
static void mch_domain_set_resources(struct device *dev)
Definition: northbridge.c:134
static void mch_domain_read_resources(struct device *dev)
Definition: northbridge.c:42
static void mch_domain_init(struct device *dev)
Definition: northbridge.c:144
static const char * northbridge_acpi_name(const struct device *dev)
Definition: northbridge.c:150
void pci_domain_scan_bus(struct device *dev)
Scan a PCI domain.
Definition: pci_device.c:1610

Definition at line 150 of file northbridge.c.

Referenced by enable_dev().