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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <console/console.h>
#include <device/device.h>
#include <device/pci.h>
#include <device/pci_ops.h>
#include <device/pci_ids.h>
#include "chip.h"
#include "i82801gx.h"
#include "sata.h"
Go to the source code of this file.
Functions | |
static u8 | get_ich7_sata_ports (void) |
void | sata_enable (struct device *dev) |
static void | sata_init (struct device *dev) |
Variables | |
static struct device_operations | sata_ops |
static const unsigned short | sata_ids [] |
static const struct pci_driver i82801gx_sata_driver | __pci_driver |
Definition at line 12 of file sata.c.
References BIOS_ERR, PCI_DEVICE_ID, pci_read_config16(), pcidev_on_root(), and printk.
Referenced by sata_init().
Definition at line 33 of file sata.c.
References AHCI_UNSUPPORTED, BIOS_DEBUG, device::chip_info, config, die(), FDVCT, pci_and_config8(), pci_read_config32(), pci_update_config8(), pcidev_on_root(), printk, SATA_MAP, SATA_MODE_AHCI, and SATA_MODE_IDE_PLAIN.
Definition at line 70 of file sata.c.
References BIOS_DEBUG, BIOS_ERR, device::chip_info, config, FAST_PCB0, FAST_PCB1, get_ich7_sata_ports(), IDE_CONFIG, IDE_DECODE_ENABLE, IDE_IE0, IDE_ISP_3_CLOCKS, IDE_ISP_5_CLOCKS, IDE_PPE0, IDE_PSDE0, IDE_RCT_1_CLOCKS, IDE_RCT_4_CLOCKS, IDE_SDMA_CNT, IDE_SDMA_TIM, IDE_SITRE, IDE_SSDE0, IDE_TIM_PRI, IDE_TIM_SEC, IDE_TIME0, INTR_LN, NULL, PCB0, PCB1, pci_and_config16(), PCI_BASE_ADDRESS_5, PCI_COMMAND, PCI_COMMAND_IO, PCI_COMMAND_MASTER, PCI_COMMAND_MEMORY, PCI_INTERRUPT_LINE, pci_or_config32(), pci_update_config32(), pci_write_config16(), pci_write_config32(), pci_write_config8(), printk, probe_resource(), res2mmio(), SATA_IR, SATA_MAP, SATA_MODE_AHCI, SATA_MODE_IDE_LEGACY_COMBINED, SATA_MODE_IDE_PLAIN, SATA_PCS, SCRD, SCRE, SIF1, SIF2, SIF3, SIG_MODE_PRI_NORMAL, and write32().
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