coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
gpio.c
Go to the documentation of this file.
1
/* SPDX-License-Identifier: GPL-2.0-or-later */
2
3
#include <baseboard/gpio.h>
4
#include <baseboard/variants.h>
5
6
/* Pad configuration in ramstage */
7
static
const
struct
pad_config
gpio_table
[] = {
8
/* A10 : WWAN_EN */
9
PAD_CFG_GPO
(
GPP_A10
, 1, PWROK),
10
11
/* B7 : WWAN_SAR_DETECT_R_ODL */
12
PAD_CFG_GPO
(
GPP_B7
, 1, DEEP),
13
14
/* C12 : AP_PEN_DET_ODL */
15
PAD_CFG_GPI_GPIO_DRIVER
(
GPP_C12
, UP_20K, DEEP),
16
17
/* D15 : EN_PP3300_CAMERA */
18
PAD_CFG_GPO
(
GPP_D15
, 1, PLTRST),
19
/* D19 : WWAN_WLAN_COEX1 */
20
PAD_NC
(
GPP_D19
,
NONE
),
21
/* D20 : WWAN_WLAN_COEX2 */
22
PAD_NC
(
GPP_D20
,
NONE
),
23
/* D21 : WWAN_WLAN_COEX3 */
24
PAD_NC
(
GPP_D21
,
NONE
),
25
/* D22 : AP_I2C_SUB_SDA*/
26
PAD_CFG_NF
(
GPP_D22
,
NONE
, DEEP, NF1),
27
/* D23 : AP_I2C_SUB_SCL */
28
PAD_CFG_NF
(
GPP_D23
,
NONE
, DEEP, NF1),
29
30
/* E11 : AP_I2C_SUB_INT_ODL */
31
PAD_CFG_GPI_APIC
(
GPP_E11
,
NONE
, PLTRST, LEVEL,
NONE
),
32
33
/* H17 : WWAN_RST_L */
34
PAD_CFG_GPO
(
GPP_H17
, 0, PLTRST),
35
};
36
37
const
struct
pad_config
*
variant_override_gpio_table
(
size_t
*num)
38
{
39
*num =
ARRAY_SIZE
(
gpio_table
);
40
return
gpio_table
;
41
}
GPP_C12
#define GPP_C12
Definition:
gpio_soc_defs.h:549
GPP_H17
#define GPP_H17
Definition:
gpio_soc_defs.h:233
GPP_A10
#define GPP_A10
Definition:
gpio_soc_defs.h:129
GPP_D19
#define GPP_D19
Definition:
gpio_soc_defs.h:271
GPP_E11
#define GPP_E11
Definition:
gpio_soc_defs.h:639
GPP_D15
#define GPP_D15
Definition:
gpio_soc_defs.h:267
GPP_B7
#define GPP_B7
Definition:
gpio_soc_defs.h:60
ARRAY_SIZE
#define ARRAY_SIZE(a)
Definition:
helpers.h:12
GPP_D23
#define GPP_D23
Definition:
gpio_soc_defs.h:133
GPP_D22
#define GPP_D22
Definition:
gpio_soc_defs.h:132
GPP_D21
#define GPP_D21
Definition:
gpio_soc_defs.h:131
GPP_D20
#define GPP_D20
Definition:
gpio_soc_defs.h:130
variant_override_gpio_table
const struct pad_config *__weak variant_override_gpio_table(size_t *num)
Definition:
gpio.c:450
gpio_table
static const struct pad_config gpio_table[]
Definition:
gpio.c:7
NONE
@ NONE
Definition:
qup_se_handlers_common.h:196
PAD_NC
#define PAD_NC(pin)
Definition:
gpio_defs.h:263
PAD_CFG_NF
#define PAD_CFG_NF(pad, pull, rst, func)
Definition:
gpio_defs.h:197
PAD_CFG_GPI_APIC
#define PAD_CFG_GPI_APIC(pad, pull, rst, trig, inv)
Definition:
gpio_defs.h:376
PAD_CFG_GPO
#define PAD_CFG_GPO(pad, val, rst)
Definition:
gpio_defs.h:247
PAD_CFG_GPI_GPIO_DRIVER
#define PAD_CFG_GPI_GPIO_DRIVER(pad, pull, rst)
Definition:
gpio_defs.h:323
pad_config
Definition:
gpio.h:75
src
mainboard
google
dedede
variants
storo
gpio.c
Generated by
1.9.1