coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
gpio.c
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #include <baseboard/gpio.h>
4 #include <baseboard/variants.h>
5 #include <bootstate.h>
6 #include <fw_config.h>
7 
8 /* Pad configuration in ramstage */
9 static const struct pad_config gpio_table[] = {
10  /* A10 : WWAN_EN */
11  PAD_CFG_GPO(GPP_A10, 1, PWROK),
12  /* A11 : TOUCH_RPT_EN ==> NC */
14 
15  /* B7 : PCIE_CLKREQ2_N ==> WWAN_SAR_DETECT_ODL*/
16  PAD_CFG_GPO(GPP_B7, 1, DEEP),
17  /* B8 : WLAN_CLKREQ_ODL ==> NC */
18  PAD_NC(GPP_B8, NONE),
19 
20  /* D0 : WWAN_HOST_WAKE ==> WWAN_WDISABLE_L */
21  PAD_CFG_GPO(GPP_D0, 1, DEEP),
22  /* D1 : WLAN_PERST_L ==> NC */
23  PAD_NC(GPP_D1, NONE),
24  /* D3 : WLAN_PCIE_WAKE_ODL ==> NC */
25  PAD_NC(GPP_D3, NONE),
26  /* D5 : TOUCHSCREEN_RESET */
27  PAD_CFG_GPO(GPP_D5, 1, DEEP),
28  /* D7 : EMR_INT_ODL */
29  PAD_CFG_GPI_APIC(GPP_D7, NONE, PLTRST, LEVEL, INVERT),
30  /* D13 : EN_PP3300_CAMERA */
31  PAD_CFG_GPO(GPP_D13, 0, PLTRST),
32  /* D15 : EN_PP2800_CAMERA */
33  PAD_CFG_GPO(GPP_D15, 0, PLTRST),
34  /* D19 : WWAN_WLAN_COEX1 ==> NC */
36  /* D20 : WWAN_WLAN_COEX2 ==> NC */
38  /* D21 : WWAN_WLAN_COEX3 ==> NC */
40  /* D22 : AP_I2C_SUB_SDA*/
41  PAD_CFG_NF(GPP_D22, NONE, DEEP, NF1),
42  /* D23 : AP_I2C_SUB_SCL */
43  PAD_CFG_NF(GPP_D23, NONE, DEEP, NF1),
44 
45  /* E0 : CLK_24M_UCAM ==> NC */
46  PAD_NC(GPP_E0, NONE),
47  /* E1 : EMR_RESET_L */
48  PAD_CFG_GPO(GPP_E1, 0, DEEP),
49  /* E10 : LTE_SAR_SENSOR_INT */
50  PAD_CFG_GPI_APIC(GPP_E10, NONE, PLTRST, LEVEL, NONE),
51  /* E13 : DDI0_DDC_SCL */
52  PAD_CFG_NF(GPP_E13, NONE, DEEP, NF1),
53  /* E14 : DDI0_DDC_SDA */
54  PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1),
55 
56  /* H17 : WWAN_RST_L */
57  PAD_CFG_GPO(GPP_H17, 0, PLTRST),
58 };
59 
60 static const struct pad_config lte_disable_pads[] = {
62  PAD_NC(GPP_D0, NONE),
64 };
65 
66 const struct pad_config *variant_override_gpio_table(size_t *num)
67 {
68  *num = ARRAY_SIZE(gpio_table);
69  return gpio_table;
70 }
71 
72 static void fw_config_handle(void *unused)
73 {
74  if (!fw_config_probe(FW_CONFIG(DB_PORTS, DB_PORTS_1C_1A_LTE)))
76 }
77 
#define GPP_D1
#define GPP_E0
#define GPP_H17
#define GPP_D7
#define GPP_E13
#define GPP_D5
#define GPP_E14
#define GPP_B8
Definition: gpio_soc_defs.h:61
#define GPP_A10
#define GPP_D0
#define GPP_D13
#define GPP_A11
#define GPP_E10
#define GPP_D19
#define GPP_D15
#define GPP_E1
#define GPP_B7
Definition: gpio_soc_defs.h:60
#define GPP_D3
@ BS_DEV_ENABLE
Definition: bootstate.h:82
@ BS_ON_ENTRY
Definition: bootstate.h:95
#define ARRAY_SIZE(a)
Definition: helpers.h:12
#define GPP_D23
#define GPP_D22
#define GPP_D21
#define GPP_D20
#define FW_CONFIG(__field, __option)
Definition: fw_config.h:28
bool fw_config_probe(const struct fw_config *match)
Definition: fw_config.c:62
const struct pad_config *__weak variant_override_gpio_table(size_t *num)
Definition: gpio.c:450
BOOT_STATE_INIT_ENTRY(BS_DEV_ENABLE, BS_ON_ENTRY, fw_config_handle, NULL)
static const struct pad_config lte_disable_pads[]
Definition: gpio.c:60
static const struct pad_config gpio_table[]
Definition: gpio.c:9
static void fw_config_handle(void *unused)
Definition: gpio.c:72
void gpio_configure_pads(const struct soc_amd_gpio *gpio_list_ptr, size_t size)
program a particular set of GPIO
Definition: gpio.c:307
#define PAD_NC(pin)
Definition: gpio_defs.h:263
#define PAD_CFG_NF(pad, pull, rst, func)
Definition: gpio_defs.h:197
#define PAD_CFG_GPI_APIC(pad, pull, rst, trig, inv)
Definition: gpio_defs.h:376
#define PAD_CFG_GPO(pad, val, rst)
Definition: gpio_defs.h:247
#define NULL
Definition: stddef.h:19
uint16_t unused
Definition: padconfig.h:13