coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
romstage.c
Go to the documentation of this file.
1
/* SPDX-License-Identifier: GPL-2.0-only */
2
3
#include <baseboard/variants.h>
4
#include <
boardid.h
>
5
#include <
console/console.h
>
6
#include <
ec/google/chromeec/ec.h
>
7
#include <
memory_info.h
>
8
#include <soc/meminit.h>
9
#include <soc/romstage.h>
10
11
void
mainboard_memory_init_params
(FSPM_UPD *memupd)
12
{
13
meminit_lpddr4_by_sku
(&memupd->FspmConfig,
14
variant_lpddr4_config
(),
variant_memory_sku
());
15
}
16
17
static
void
save_dimm_info_by_sku_config
(
void
)
18
{
19
save_lpddr4_dimm_info
(
variant_lpddr4_config
(),
variant_memory_sku
());
20
}
21
22
void
mainboard_save_dimm_info
(
void
)
23
{
24
char
part_num_store[
DIMM_INFO_PART_NUMBER_SIZE
];
25
const
char
*part_num =
NULL
;
26
27
if
(
CONFIG
(DRAM_PART_NUM_NOT_ALWAYS_IN_CBI)) {
28
/* Fall back on part numbers encoded in lp4cfg array. */
29
if
((
int
)
board_id
() < CONFIG_DRAM_PART_IN_CBI_BOARD_ID_MIN) {
30
save_dimm_info_by_sku_config
();
31
return
;
32
}
33
}
34
35
if
(
google_chromeec_cbi_get_dram_part_num
(&part_num_store[0],
36
ARRAY_SIZE
(part_num_store)) < 0)
37
printk
(
BIOS_ERR
,
"Couldn't obtain DRAM part number from CBI\n"
);
38
else
39
part_num = &part_num_store[0];
40
41
save_lpddr4_dimm_info_part_num
(part_num);
42
}
save_lpddr4_dimm_info
void save_lpddr4_dimm_info(const struct lpddr4_cfg *lpcfg, size_t mem_sku)
Definition:
meminit_util_apl.c:93
save_lpddr4_dimm_info_part_num
void save_lpddr4_dimm_info_part_num(const char *dram_part_num)
Definition:
meminit_util_apl.c:17
meminit_lpddr4_by_sku
void meminit_lpddr4_by_sku(FSP_M_CONFIG *cfg, const struct lpddr4_cfg *lpcfg, size_t sku_id)
Definition:
meminit.c:315
boardid.h
ARRAY_SIZE
#define ARRAY_SIZE(a)
Definition:
helpers.h:12
printk
#define printk(level,...)
Definition:
stdlib.h:16
console.h
mainboard_save_dimm_info
__weak void mainboard_save_dimm_info(struct romstage_params *params)
Definition:
romstage.c:138
CONFIG
@ CONFIG
Definition:
dsi_common.h:201
google_chromeec_cbi_get_dram_part_num
int google_chromeec_cbi_get_dram_part_num(char *buf, size_t bufsize)
Definition:
ec.c:905
ec.h
board_id
uint32_t board_id(void)
board_id() - Get the board version
Definition:
ec_boardid.c:6
variant_lpddr4_config
const struct lpddr4_cfg * variant_lpddr4_config(void)
Definition:
memory.c:190
BIOS_ERR
#define BIOS_ERR
BIOS_ERR - System in incomplete state.
Definition:
loglevel.h:72
mainboard_memory_init_params
void mainboard_memory_init_params(FSPM_UPD *mupd)
Definition:
romstage.c:22
variant_memory_sku
int __weak variant_memory_sku(void)
Definition:
memory.c:74
save_dimm_info_by_sku_config
static void save_dimm_info_by_sku_config(void)
Definition:
romstage.c:17
memory_info.h
DIMM_INFO_PART_NUMBER_SIZE
#define DIMM_INFO_PART_NUMBER_SIZE
Definition:
memory_info.h:10
NULL
#define NULL
Definition:
stddef.h:19
src
mainboard
google
octopus
romstage.c
Generated by
1.9.1