coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
report_platform.c File Reference
#include <arch/cpu.h>
#include <device/pci_ops.h>
#include <console/console.h>
#include <cpu/intel/cpu_ids.h>
#include <cpu/intel/microcode.h>
#include <cpu/x86/msr.h>
#include <device/pci.h>
#include <device/pci_ids.h>
#include <soc/bootblock.h>
#include <soc/pch.h>
#include <soc/pci_devs.h>
#include <string.h>
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Functions

static uint8_t get_dev_revision (pci_devfn_t dev)
 
static uint16_t get_dev_id (pci_devfn_t dev)
 
static void report_cpu_info (void)
 
static void report_mch_info (void)
 
static void report_pch_info (void)
 
static void report_igd_info (void)
 
void report_platform_info (void)
 

Variables

struct {
   u32   cpuid
 
   const char *   name
 
cpu_table []
 
struct {
   u16   mchid
 
   const char *   name
 
mch_table []
 
struct {
   u16   espiid
 
   const char *   name
 
pch_table []
 
struct {
   u16   igdid
 
   const char *   name
 
igd_table []
 

Function Documentation

◆ get_dev_id()

static uint16_t get_dev_id ( pci_devfn_t  dev)
static

Definition at line 73 of file report_platform.c.

References PCI_DEVICE_ID, and pci_read_config16().

Referenced by report_igd_info(), report_mch_info(), and report_pch_info().

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◆ get_dev_revision()

static uint8_t get_dev_revision ( pci_devfn_t  dev)
static

Definition at line 68 of file report_platform.c.

References pci_read_config8(), and PCI_REVISION_ID.

Referenced by report_igd_info(), report_mch_info(), and report_pch_info().

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◆ report_cpu_info()

static void report_cpu_info ( void  )
static

Definition at line 78 of file report_platform.c.

References ARRAY_SIZE, BIOS_DEBUG, cpu_get_cpuid(), cpu_get_feature_flags_ecx(), cpu_id, cpu_table, cpuid, CPUID_AES, CPUID_SMX, CPUID_VMX, cpuid_result::eax, cpuid_result::ebx, cpuid_result::ecx, cpuid_result::edx, get_current_microcode_rev(), printk, and strlen().

Referenced by report_platform_info().

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◆ report_igd_info()

static void report_igd_info ( void  )
static

Definition at line 168 of file report_platform.c.

References ARRAY_SIZE, BIOS_DEBUG, get_dev_id(), get_dev_revision(), igd_table, igdid, printk, and SA_DEV_IGD.

Referenced by report_platform_info().

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◆ report_mch_info()

static void report_mch_info ( void  )
static

Definition at line 132 of file report_platform.c.

References ARRAY_SIZE, BIOS_DEBUG, get_dev_id(), get_dev_revision(), mch_table, mchid, printk, and SA_DEV_ROOT.

Referenced by report_platform_info().

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◆ report_pch_info()

static void report_pch_info ( void  )
static

Definition at line 151 of file report_platform.c.

References ARRAY_SIZE, BIOS_DEBUG, espiid, get_dev_id(), get_dev_revision(), PCH_DEV_ESPI, pch_table, pch_type(), and printk.

Referenced by report_platform_info().

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◆ report_platform_info()

void report_platform_info ( void  )

Definition at line 185 of file report_platform.c.

References report_cpu_info(), report_igd_info(), report_mch_info(), and report_pch_info().

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Variable Documentation

◆ 

struct { ... } cpu_table[]
Initial value:
= {
{ CPUID_ICELAKE_A0, "Icelake A0" },
{ CPUID_ICELAKE_B0, "Icelake B0" },
}
#define CPUID_ICELAKE_B0
Definition: cpu_ids.h:40
#define CPUID_ICELAKE_A0
Definition: cpu_ids.h:39

Referenced by report_cpu_info().

◆ cpuid

u32 cpuid

Definition at line 17 of file report_platform.c.

◆ espiid

u16 espiid

Definition at line 35 of file report_platform.c.

◆ 

struct { ... } igd_table[]
Initial value:
= {
{ PCI_DID_INTEL_ICL_GT0_ULT, "Icelake ULT GT0" },
{ PCI_DID_INTEL_ICL_GT0_5_ULT, "Icelake ULT GT0.5" },
{ PCI_DID_INTEL_ICL_GT1_ULT, "Icelake U GT1" },
{ PCI_DID_INTEL_ICL_GT2_ULX_0, "Icelake Y GT2" },
{ PCI_DID_INTEL_ICL_GT2_ULX_1, "Icelake Y GT2_1" },
{ PCI_DID_INTEL_ICL_GT2_ULT_1, "Icelake U GT2_1" },
{ PCI_DID_INTEL_ICL_GT2_ULX_2, "Icelake Y GT2_2" },
{ PCI_DID_INTEL_ICL_GT2_ULT_2, "Icelake U GT2_2" },
{ PCI_DID_INTEL_ICL_GT2_ULX_3, "Icelake Y GT2_3" },
{ PCI_DID_INTEL_ICL_GT2_ULT_3, "Icelake U GT2_3" },
{ PCI_DID_INTEL_ICL_GT2_ULX_4, "Icelake Y GT2_4" },
{ PCI_DID_INTEL_ICL_GT2_ULT_4, "Icelake U GT2_4" },
{ PCI_DID_INTEL_ICL_GT2_ULX_5, "Icelake Y GT2_5" },
{ PCI_DID_INTEL_ICL_GT2_ULT_5, "Icelake U GT2_5" },
{ PCI_DID_INTEL_ICL_GT3_ULT, "Icelake U GT3" },
}
#define PCI_DID_INTEL_ICL_GT2_ULT_1
Definition: pci_ids.h:3873
#define PCI_DID_INTEL_ICL_GT3_ULT
Definition: pci_ids.h:3883
#define PCI_DID_INTEL_ICL_GT2_ULX_3
Definition: pci_ids.h:3876
#define PCI_DID_INTEL_ICL_GT2_ULT_4
Definition: pci_ids.h:3879
#define PCI_DID_INTEL_ICL_GT2_ULT_5
Definition: pci_ids.h:3881
#define PCI_DID_INTEL_ICL_GT2_ULX_0
Definition: pci_ids.h:3871
#define PCI_DID_INTEL_ICL_GT2_ULX_4
Definition: pci_ids.h:3878
#define PCI_DID_INTEL_ICL_GT2_ULX_2
Definition: pci_ids.h:3874
#define PCI_DID_INTEL_ICL_GT2_ULT_2
Definition: pci_ids.h:3875
#define PCI_DID_INTEL_ICL_GT0_ULT
Definition: pci_ids.h:3868
#define PCI_DID_INTEL_ICL_GT2_ULX_1
Definition: pci_ids.h:3872
#define PCI_DID_INTEL_ICL_GT1_ULT
Definition: pci_ids.h:3870
#define PCI_DID_INTEL_ICL_GT2_ULX_5
Definition: pci_ids.h:3880
#define PCI_DID_INTEL_ICL_GT0_5_ULT
Definition: pci_ids.h:3869
#define PCI_DID_INTEL_ICL_GT2_ULT_3
Definition: pci_ids.h:3877

Referenced by report_igd_info().

◆ igdid

u16 igdid

Definition at line 48 of file report_platform.c.

◆ 

struct { ... } mch_table[]
Initial value:
= {
{ PCI_DID_INTEL_ICL_ID_U, "Icelake-U" },
{ PCI_DID_INTEL_ICL_ID_U_2_2, "Icelake-U-2-2" },
{ PCI_DID_INTEL_ICL_ID_Y, "Icelake-Y" },
{ PCI_DID_INTEL_ICL_ID_Y_2, "Icelake-Y-2" },
}
#define PCI_DID_INTEL_ICL_ID_Y_2
Definition: pci_ids.h:4004
#define PCI_DID_INTEL_ICL_ID_U_2_2
Definition: pci_ids.h:4002
#define PCI_DID_INTEL_ICL_ID_U
Definition: pci_ids.h:4001
#define PCI_DID_INTEL_ICL_ID_Y
Definition: pci_ids.h:4003

Referenced by report_mch_info().

◆ mchid

u16 mchid

Definition at line 25 of file report_platform.c.

◆ name

const char* name

Definition at line 18 of file report_platform.c.

◆ 

struct { ... } pch_table[]
Initial value:
= {
{ PCI_DID_INTEL_ICL_BASE_U_ESPI, "Icelake-U Base" },
{ PCI_DID_INTEL_ICL_BASE_Y_ESPI, "Icelake-Y Base" },
{ PCI_DID_INTEL_ICL_U_PREMIUM_ESPI, "Icelake-U Premium" },
{ PCI_DID_INTEL_ICL_U_SUPER_U_ESPI, "Icelake-U Super" },
{ PCI_DID_INTEL_ICL_U_SUPER_U_ESPI_REV0, "Icelake-U Super REV0" },
{ PCI_DID_INTEL_ICL_SUPER_Y_ESPI, "Icelake-Y Super" },
{ PCI_DID_INTEL_ICL_Y_PREMIUM_ESPI, "Icelake-Y Premium" },
}
#define PCI_DID_INTEL_ICL_BASE_Y_ESPI
Definition: pci_ids.h:2912
#define PCI_DID_INTEL_ICL_SUPER_Y_ESPI
Definition: pci_ids.h:2915
#define PCI_DID_INTEL_ICL_U_SUPER_U_ESPI_REV0
Definition: pci_ids.h:2910
#define PCI_DID_INTEL_ICL_BASE_U_ESPI
Definition: pci_ids.h:2913
#define PCI_DID_INTEL_ICL_Y_PREMIUM_ESPI
Definition: pci_ids.h:2914
#define PCI_DID_INTEL_ICL_U_PREMIUM_ESPI
Definition: pci_ids.h:2911
#define PCI_DID_INTEL_ICL_U_SUPER_U_ESPI
Definition: pci_ids.h:2909

Referenced by report_pch_info().