coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
sdhci_display.c
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * Secure Digital (SD) Host Controller interface specific code
4  */
5 
7 #include <commonlib/sdhci.h>
8 #include <commonlib/storage.h>
9 #include "sdhci.h"
10 #include "sd_mmc.h"
11 #include "storage.h"
12 
14 {
15  if (CONFIG(SDHC_DEBUG)) {
16  int bits;
17  uint8_t host_ctrl;
18  uint16_t host2;
19  const char *rate;
20  uint16_t timing;
21 
22  /* Display the bus width */
25  timing = host2 & SDHCI_CTRL_UHS_MASK;
26  bits = 1;
27  if (host_ctrl & SDHCI_CTRL_8BITBUS)
28  bits = 8;
29  else if (host_ctrl & SDHCI_CTRL_4BITBUS)
30  bits = 4;
31  rate = "SDR";
32  if ((timing == SDHCI_CTRL_UHS_DDR50)
33  || (timing == SDHCI_CTRL_HS400))
34  rate = "DDR";
35  sdhc_debug("SDHCI bus width: %d bit%s %s\n", bits,
36  (bits != 1) ? "s" : "", rate);
37  }
38 }
39 
41 {
42  if (CONFIG(SDHC_DEBUG)) {
43  uint16_t clk_ctrl;
44  uint32_t clock;
45  uint32_t divisor;
46 
47  /* Display the clock */
49  sdhc_debug("SDHCI bus clock: ");
50  if (clk_ctrl & SDHCI_CLOCK_CARD_EN) {
51  divisor = (clk_ctrl >> SDHCI_DIVIDER_SHIFT)
53  divisor |= ((clk_ctrl >> SDHCI_DIVIDER_SHIFT)
55  divisor <<= 1;
57  if (divisor)
58  clock /= divisor;
59  sdhc_debug("%d.%03d MHz\n", clock / 1000000,
60  (clock / 1000) % 1000);
61  } else
62  sdhc_debug("Off\n");
63  }
64 }
65 
67 {
68  if (CONFIG(SDHC_DEBUG)) {
69  u8 pwr_ctrl;
70  const char *voltage;
71  const char *voltage_table[8] = {
72  "Unknown", /* 0 */
73  "Unknown", /* 1 */
74  "Unknown", /* 2 */
75  "Unknown", /* 3 */
76  "Unknown", /* 4 */
77  "1.8", /* 5 */
78  "3.0", /* 6 */
79  "3.3", /* 7 */
80  };
81 
83  if (pwr_ctrl & SDHCI_POWER_ON) {
84  voltage = voltage_table[(pwr_ctrl & SDHCI_POWER_330)
85  >> 1];
86  sdhc_debug("SDHCI voltage: %s Volts\n", voltage);
87  } else
88  sdhc_debug("SDHCI voltage: Off\n");
89  }
90 }
91 
93 {
94  /* Display the controller setup */
98 }
@ CONFIG
Definition: dsi_common.h:201
unsigned int voltage
Definition: edid.c:62
#define sdhc_debug(format...)
Definition: sd_mmc.h:64
static void sdhci_display_bus_width(struct sdhci_ctrlr *sdhci_ctrlr)
Definition: sdhci_display.c:13
static void sdhci_display_clock(struct sdhci_ctrlr *sdhci_ctrlr)
Definition: sdhci_display.c:40
void sdhci_display_setup(struct sdhci_ctrlr *sdhci_ctrlr)
Definition: sdhci_display.c:92
static void sdhci_display_voltage(struct sdhci_ctrlr *sdhci_ctrlr)
Definition: sdhci_display.c:66
unsigned short uint16_t
Definition: stdint.h:11
unsigned int uint32_t
Definition: stdint.h:14
uint8_t u8
Definition: stdint.h:45
unsigned char uint8_t
Definition: stdint.h:8
#define SDHCI_CTRL_UHS_DDR50
Definition: sdhci.h:145
#define SDHCI_POWER_ON
Definition: sdhci.h:73
#define SDHCI_CTRL_4BITBUS
Definition: sdhci.h:61
#define SDHCI_CTRL_UHS_MASK
Definition: sdhci.h:140
#define SDHCI_HOST_CONTROL
Definition: sdhci.h:59
#define SDHCI_POWER_330
Definition: sdhci.h:76
#define SDHCI_DIV_MASK
Definition: sdhci.h:88
#define SDHCI_CLOCK_CONTROL
Definition: sdhci.h:85
#define SDHCI_HOST_CONTROL2
Definition: sdhci.h:139
static u8 sdhci_readb(struct sdhci_ctrlr *sdhci_ctrlr, int reg)
Definition: sdhci.h:255
#define SDHCI_DIV_MASK_LEN
Definition: sdhci.h:89
static u16 sdhci_readw(struct sdhci_ctrlr *sdhci_ctrlr, int reg)
Definition: sdhci.h:250
#define SDHCI_CTRL_8BITBUS
Definition: sdhci.h:68
#define SDHCI_CTRL_HS400
Definition: sdhci.h:146
#define SDHCI_CLOCK_CARD_EN
Definition: sdhci.h:91
#define SDHCI_DIV_HI_MASK
Definition: sdhci.h:90
#define SDHCI_POWER_CONTROL
Definition: sdhci.h:72
#define SDHCI_DIVIDER_SHIFT
Definition: sdhci.h:86
Definition: spm.h:654
Definition: pll.c:262
uint32_t clock_base
Definition: sd_mmc_ctrlr.h:151
struct sd_mmc_ctrlr sd_mmc_ctrlr
Definition: sdhci.h:36