6 #include <soc/soc_chip.h>
7 #include <soc/pci_devs.h>
19 if (
CONFIG(DISABLE_HECI1_AT_PRE_BOOT))
31 #if CONFIG(SOC_INTEL_COMMON_BLOCK_SMM_TCO_ENABLE)
#define SMI_ON_SLP_EN_STS_BIT
void smihandler_southbridge_monitor(const struct smm_save_state_ops *save_state_ops)
void smihandler_southbridge_mc(const struct smm_save_state_ops *save_state_ops)
const smi_handler_t southbridge_smi[SMI_STS_BITS]
void(* smi_handler_t)(void)
void smihandler_soc_at_finalize(void)
void smihandler_southbridge_gpe0(const struct smm_save_state_ops *save_state_ops)
void smihandler_southbridge_sleep(const struct smm_save_state_ops *save_state_ops)
void smihandler_southbridge_gpi(const struct smm_save_state_ops *save_state_ops)
void smihandler_southbridge_periodic(const struct smm_save_state_ops *save_state_ops)
void smihandler_southbridge_tco(const struct smm_save_state_ops *save_state_ops)
void smihandler_southbridge_espi(const struct smm_save_state_ops *save_state_ops)
void smihandler_southbridge_pm1(const struct smm_save_state_ops *save_state_ops)
void smihandler_southbridge_apmc(const struct smm_save_state_ops *save_state_ops)