coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
gpio.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <commonlib/helpers.h>
4 #include <baseboard/variants.h>
5 
6 /*
7  * Pad configuration in ramstage. The order largely follows the 'GPIO Muxing'
8  * table found in EDS vol 1, but some pins aren't grouped functionally in
9  * the table so those were moved for more logical grouping.
10  */
11 static const struct pad_config gpio_table[] = {
12  /* Southwest Community */
13 
14  /* PCIE_WAKE[0:3]_N - unused */
15  PAD_CFG_GPI(GPIO_205, UP_20K, DEEP),
16  PAD_CFG_GPI(GPIO_206, UP_20K, DEEP),
17  PAD_CFG_GPI(GPIO_207, UP_20K, DEEP),
18  PAD_CFG_GPI(GPIO_208, UP_20K, DEEP),
19 
20  /* EMMC interface. */
21  PAD_CFG_NF(GPIO_156, DN_20K, DEEP, NF1), /* EMMC_CLK */
22  PAD_CFG_NF(GPIO_157, UP_20K, DEEP, NF1), /* EMMC_D0 */
23  PAD_CFG_NF(GPIO_158, UP_20K, DEEP, NF1), /* EMMC_D1 */
24  PAD_CFG_NF(GPIO_159, UP_20K, DEEP, NF1), /* EMMC_D2 */
25  PAD_CFG_NF(GPIO_160, UP_20K, DEEP, NF1), /* EMMC_D3 */
26  PAD_CFG_NF(GPIO_161, UP_20K, DEEP, NF1), /* EMMC_D4 */
27  PAD_CFG_NF(GPIO_162, UP_20K, DEEP, NF1), /* EMMC_D5 */
28  PAD_CFG_NF(GPIO_163, UP_20K, DEEP, NF1), /* EMMC_D6 */
29  PAD_CFG_NF(GPIO_164, UP_20K, DEEP, NF1), /* EMMC_D7 */
30  PAD_CFG_NF(GPIO_165, UP_20K, DEEP, NF1), /* EMMC_CMD */
31  PAD_CFG_NF(GPIO_182, DN_20K, DEEP, NF1), /* EMMC_RCLK */
32 
33  /* SDIO - unused */
34  PAD_CFG_GPI(GPIO_166, DN_20K, DEEP),
35  PAD_CFG_GPI(GPIO_167, DN_20K, DEEP),
36  PAD_CFG_NF(GPIO_168, UP_20K, DEEP, NF1),
37  PAD_CFG_GPI(GPIO_169, DN_20K, DEEP),
38  PAD_CFG_GPI(GPIO_170, DN_20K, DEEP),
39  PAD_CFG_GPI(GPIO_171, DN_20K, DEEP),
40 
41  /* SDCARD */
42  PAD_CFG_NF(GPIO_172, DN_20K, DEEP, NF1), /* SDCARD_CLK */
43  PAD_CFG_NF(GPIO_173, UP_20K, DEEP, NF1), /* SDCARD_D0 */
44  PAD_CFG_NF(GPIO_174, UP_20K, DEEP, NF1), /* SDCARD_D1 */
45  PAD_CFG_NF(GPIO_175, UP_20K, DEEP, NF1), /* SDCARD_D2 */
46  PAD_CFG_NF(GPIO_176, UP_20K, DEEP, NF1), /* SDCARD_D3 */
47  PAD_CFG_NF(GPIO_177, UP_20K, DEEP, NF1), /* SDCARD_CD_N */
48  PAD_CFG_NF(GPIO_178, UP_20K, DEEP, NF1), /* SDCARD_CMD */
49  /*
50  * SDCARD_CLK_FB - APL EDS Vol1 remarks:
51  * This is not a physical GPIO that can be used. This Signal is not Ball
52  * out on the SoC, only the buffer exists.
53  */
54  PAD_CFG_NF(GPIO_179, DN_20K, DEEP, NF1),
55  PAD_CFG_NF(GPIO_186, UP_20K, DEEP, NF1), /* SDCARD_WP_1V8 */
56  PAD_CFG_TERM_GPO(GPIO_183, 1, UP_20K, DEEP), /* SD_PWR_EN_1V8 */
57 
58  /* West Community */
59 
60  PAD_CFG_GPI(GPIO_124, DN_20K, DEEP), /* unused */
61  PAD_CFG_GPI(GPIO_125, DN_20K, DEEP), /* unused */
62  PAD_CFG_GPI(GPIO_126, DN_20K, DEEP), /* unused */
63  PAD_CFG_GPI(GPIO_127, DN_20K, DEEP), /* unused */
64 
65  PAD_CFG_NF(GPIO_128, NONE, DEEP, NF1), /* provided LPSS_I2C2_SDA */
66  PAD_CFG_NF(GPIO_129, NONE, DEEP, NF1), /* provided LPSS_I2C2_SCL */
67 
68  PAD_CFG_GPI(GPIO_130, DN_20K, DEEP), /* unused */
69  PAD_CFG_GPI(GPIO_131, DN_20K, DEEP), /* unused */
70 
71  PAD_CFG_NF(GPIO_132, NONE, DEEP, NF1), /* provided LPSS_I2C4_SDA */
72  PAD_CFG_NF(GPIO_133, NONE, DEEP, NF1), /* provided LPSS_I2C4_SCL */
73 
74  /*
75  * Hint for USB enable power: some GPIOs are open drain outputs,
76  * to drive high -> Bit GPIO_TX_DIS has to be set in combination with PU
77  * PAD_CFG_GPO macro does not work. Refer to APL EDS Vol 4.
78  */
79  PAD_CFG_GPI(GPIO_134, UP_20K, DEEP), /* enable USB0 power */
80  PAD_CFG_GPI(GPIO_135, UP_20K, DEEP), /* unused */
81  PAD_CFG_GPI(GPIO_136, UP_20K, DEEP), /* enable USB7 power */
82  PAD_CFG_GPI(GPIO_137, UP_20K, DEEP), /* enable USB6 power */
83  PAD_CFG_GPI(GPIO_138, UP_20K, DEEP), /* enable USB2 power */
84  PAD_CFG_GPI(GPIO_139, UP_20K, DEEP), /* enable USB1 power */
85 
86  /* ISH_GPIO_[0:9] -- unused */
87  PAD_CFG_GPI(GPIO_146, DN_20K, DEEP), /* ISH_GPIO_0 */
88  PAD_CFG_GPI(GPIO_147, DN_20K, DEEP), /* ISH_GPIO_1 */
89  PAD_CFG_GPI(GPIO_148, DN_20K, DEEP), /* ISH_GPIO_2 */
90  PAD_CFG_GPI(GPIO_149, DN_20K, DEEP), /* ISH_GPIO_3 */
91  PAD_CFG_GPI(GPIO_150, DN_20K, DEEP), /* ISH_GPIO_4 */
92  PAD_CFG_GPI(GPIO_151, DN_20K, DEEP), /* ISH_GPIO_5 */
93  PAD_CFG_GPI(GPIO_152, DN_20K, DEEP), /* ISH_GPIO_6 */
94  PAD_CFG_GPI(GPIO_153, DN_20K, DEEP), /* ISH_GPIO_7 */
95  PAD_CFG_GPI(GPIO_154, DN_20K, DEEP), /* ISH_GPIO_8 */
96  PAD_CFG_GPI(GPIO_155, DN_20K, DEEP), /* ISH_GPIO_9 */
97 
98  /* PCIE_CLKREQ[0:3]_N */
99  PAD_CFG_NF(GPIO_209, DN_20K, DEEP, NF1),
100  PAD_CFG_NF(GPIO_210, DN_20K, DEEP, NF1),
101  PAD_CFG_NF(GPIO_211, DN_20K, DEEP, NF1),
102  PAD_CFG_NF(GPIO_212, DN_20K, DEEP, NF1),
103 
104  /* OSC_CLK_OUT_[0:4] - unused */
105  PAD_CFG_GPI(OSC_CLK_OUT_0, DN_20K, DEEP),
106  PAD_CFG_GPI(OSC_CLK_OUT_1, DN_20K, DEEP),
107  PAD_CFG_GPI(OSC_CLK_OUT_2, DN_20K, DEEP),
108  PAD_CFG_GPI(OSC_CLK_OUT_3, DN_20K, DEEP),
109  PAD_CFG_GPI(OSC_CLK_OUT_4, DN_20K, DEEP),
110 
111  /* PMU Signals */
112  PAD_CFG_NF(PMU_AC_PRESENT, UP_20K, DEEP, NF1),
113  PAD_CFG_NF(PMU_BATLOW_B, UP_20K, DEEP, NF1),
114  PAD_CFG_NF(PMU_PLTRST_B, NONE, DEEP, NF1),
115  PAD_CFG_NF(PMU_PWRBTN_B, UP_20K, DEEP, NF1),
116  PAD_CFG_NF(PMU_RESETBUTTON_B, NONE, DEEP, NF1),
117  PAD_CFG_GPI(PMU_SLP_S0_B, UP_20K, DEEP),
118  PAD_CFG_GPI(PMU_SLP_S3_B, UP_20K, DEEP),
119  PAD_CFG_GPI(PMU_SLP_S4_B, UP_20K, DEEP),
120  PAD_CFG_GPI(PMU_WAKE_B, DN_20K, DEEP),
121  PAD_CFG_GPI(SUS_STAT_B, DN_20K, DEEP),
122  PAD_CFG_GPI(SUSPWRDNACK, DN_20K, DEEP),
123 
124  /* Northwest Community */
125 
126  /* DDI0 SDA and SCL - Display-Port X24 */
127  PAD_CFG_NF(GPIO_187, UP_20K, DEEP, NF1), /* HV_DDI0_DDC_SDA */
128  PAD_CFG_NF(GPIO_188, UP_20K, DEEP, NF1), /* HV_DDI0_DDC_SCL */
129  /* DDI1 SDA and SCL - unused */
130  PAD_CFG_GPI(GPIO_189, DN_20K, DEEP),
131  PAD_CFG_GPI(GPIO_190, DN_20K, DEEP),
132  /* MIPI I2C - unused */
133  PAD_CFG_GPI(GPIO_191, DN_20K, DEEP),
134  PAD_CFG_GPI(GPIO_192, DN_20K, DEEP),
135 
136  /* Panel 0 control - unused */
137  PAD_CFG_GPI(GPIO_193, DN_20K, DEEP), /* PNL0_VDDEN */
138  PAD_CFG_GPI(GPIO_194, DN_20K, DEEP), /* PNL0_BKLTEN */
139  PAD_CFG_GPI(GPIO_195, DN_20K, DEEP), /* PNL0_BKLTCTL */
140 
141  /* Panel 1 control - unused */
142  PAD_CFG_GPI(GPIO_196, DN_20K, DEEP), /* PNL1_VDDEN */
143  PAD_CFG_GPI(GPIO_197, DN_20K, DEEP), /* PNL1_BKLTEN */
144  PAD_CFG_GPI(GPIO_198, DN_20K, DEEP), /* PNL1_BKLTCTL */
145 
146  /* DDI[0:1]_HPD */
147  PAD_CFG_GPI(GPIO_199, UP_20K, DEEP), /* DDI1_HPD unused */
148  PAD_CFG_NF(GPIO_200, UP_20K, DEEP, NF2), /* DDI0_HDP X24 */
149 
150  /* MDSI signals - unused */
151  PAD_CFG_GPI(GPIO_201, DN_20K, DEEP), /* MDSI_A_TE */
152  PAD_CFG_GPI(GPIO_202, DN_20K, DEEP), /* MDSI_C_TE */
153 
154  /* USB overcurrent pins. */
155  PAD_CFG_NF(GPIO_203, UP_20K, DEEP, NF1), /* USB_OC0_N */
156  PAD_CFG_NF(GPIO_204, UP_20K, DEEP, NF1), /* USB_OC1_N */
157 
158  /* PMC SPI */
159  PAD_CFG_GPI(PMC_SPI_FS0, DN_20K, DEEP), /* unused */
160  PAD_CFG_NF(PMC_SPI_FS1, UP_20K, DEEP, NF2), /* XHPD_EDP_APL */
161  PAD_CFG_GPI(PMC_SPI_FS2, DN_20K, DEEP), /* unused */
162  PAD_CFG_GPI(PMC_SPI_RXD, DN_20K, DEEP), /* unused */
163  PAD_CFG_GPI(PMC_SPI_TXD, DN_20K, DEEP), /* unused */
164  PAD_CFG_GPI(PMC_SPI_CLK, DN_20K, DEEP), /* unused */
165 
166  /* PMIC Signals unused signals related to an old PMIC interface. */
167  PAD_CFG_NF(PMIC_PWRGOOD, DN_20K, DEEP, NF1), /* PMIC_PWRGOOD */
168  PAD_CFG_GPI(PMIC_RESET_B, DN_20K, DEEP), /* PMIC_RESET_B */
169  PAD_CFG_GPI(GPIO_213, UP_20K, DEEP), /* PMIC_SDWN_B */
170  PAD_CFG_GPI(GPIO_214, DN_20K, DEEP), /* PMIC_BCUDISW2 */
171  PAD_CFG_GPI(GPIO_215, DN_20K, DEEP), /* PMIC_BCUDISCRIT */
172  PAD_CFG_NF(PMIC_THERMTRIP_B, UP_20K, DEEP, NF1),/* THERMTRIP_N */
173  PAD_CFG_GPI(PMIC_STDBY, DN_20K, DEEP), /* PMIC_STDBY */
174  PAD_CFG_NF(PROCHOT_B, UP_20K, DEEP, NF1), /* PROCHOT_N */
175  PAD_CFG_GPI(PMIC_I2C_SCL, DN_20K, DEEP), /* unused */
176  PAD_CFG_GPI(PMIC_I2C_SDA, DN_20K, DEEP), /* unused */
177 
178  /* I2S1 - unused */
179  PAD_CFG_GPI(GPIO_74, DN_20K, DEEP), /* I2S1_MCLK */
180  PAD_CFG_GPI(GPIO_75, DN_20K, DEEP), /* I2S1_BCLK */
181  PAD_CFG_GPI(GPIO_76, DN_20K, DEEP), /* I2S1_WS_SYNC */
182  PAD_CFG_GPI(GPIO_77, DN_20K, DEEP), /* I2S1_SDI */
183  PAD_CFG_GPI(GPIO_78, DN_20K, DEEP), /* I2S1_SDO */
184 
185  /* DMIC or I2S4 - unused */
186  PAD_CFG_GPI(GPIO_79, DN_20K, DEEP), /* AVS_M_CLK_A1 */
187  PAD_CFG_GPI(GPIO_80, DN_20K, DEEP), /* AVS_M_CLK_B1 */
188  PAD_CFG_GPI(GPIO_81, DN_20K, DEEP), /* AVS_M_DATA_1 */
189  PAD_CFG_GPI(GPIO_82, DN_20K, DEEP), /* AVS_M_CLK_AB2 */
190  PAD_CFG_GPI(GPIO_83, DN_20K, DEEP), /* AVS_M_DATA_2 */
191 
192  /* I2S2 - unused */
193  PAD_CFG_GPO(GPIO_84, 0, DEEP), /* AVS_I2S2_MCLK */
194  PAD_CFG_GPI(GPIO_85, DN_20K, DEEP), /* AVS_I2S2_BCLK */
195  PAD_CFG_GPI(GPIO_86, DN_20K, DEEP), /* AVS_I2S2_WS_SYNC */
196  PAD_CFG_GPI(GPIO_87, DN_20K, DEEP), /* AVS_I2S2_SDI */
197  PAD_CFG_GPI(GPIO_88, DN_20K, DEEP), /* AVS_I2S2_SDO */
198 
199  /* I2S3 - unused */
200  PAD_CFG_GPI(GPIO_89, DN_20K, DEEP), /* AVS_I2S3_BCLK */
201  PAD_CFG_GPI(GPIO_90, DN_20K, DEEP), /* AVS_I2S3_WS_SYNC */
202  PAD_CFG_GPI(GPIO_91, DN_20K, DEEP), /* AVS_I2S3_SDI */
203  PAD_CFG_GPI(GPIO_92, DN_20K, DEEP), /* AVS_I2S3_SDO */
204 
205  /* Fast SPI for mainboard Flash and TPM on mainboard. */
206  PAD_CFG_NF(GPIO_97, NATIVE, DEEP, NF1), /* FST_SPI_CS0_B */
207  PAD_CFG_GPI(GPIO_98, DN_20K, DEEP), /* FST_SPI_CS1_B - unused */
208  PAD_CFG_NF(GPIO_99, NATIVE, DEEP, NF1), /* FST_SPI_MOSI_IO0 */
209  PAD_CFG_NF(GPIO_100, NATIVE, DEEP, NF1),/* FST_SPI_MISO_IO1 */
210  PAD_CFG_NF(GPIO_101, NATIVE, DEEP, NF1),/* FST_IO2 - MEM_CONFIG0 */
211  PAD_CFG_NF(GPIO_102, NATIVE, DEEP, NF1),/* FST_IO3 - MEM_CONFIG1 */
212  PAD_CFG_NF(GPIO_103, NATIVE, DEEP, NF1),/* FST_SPI_CLK */
213  /* FST_SPI_CLK_FB - Pad not bonded, default register value is the same
214  * as here. Refer to Intel Doc APL EDS Vol 1 */
215  PAD_CFG_NF(FST_SPI_CLK_FB, NONE, DEEP, NF1),
216 
217  /* SIO_SPI_0 for F-module on mainboard */
218  PAD_CFG_NF(GPIO_104, DN_20K, DEEP, NF1),
219  PAD_CFG_NF(GPIO_105, UP_20K, DEEP, NF1),
220  /* GPIO_106 configured as XCS for TPM */
221  PAD_CFG_NF(GPIO_106, UP_20K, DEEP, NF3),
222  PAD_CFG_NF(GPIO_109, UP_20K, DEEP, NF1),
223  PAD_CFG_NF(GPIO_110, UP_20K, DEEP, NF1),
224 
225  /* SIO_SPI_1 -- unused */
226  PAD_CFG_GPI(GPIO_111, DN_20K, DEEP), /* GP_SSP_1_CLK */
227  PAD_CFG_GPI(GPIO_112, DN_20K, DEEP), /* GP_SSP_1_FS0 */
228  PAD_CFG_GPI(GPIO_113, DN_20K, DEEP), /* GP_SSP_1_FS1 */
229  PAD_CFG_GPI(GPIO_116, DN_20K, DEEP), /* GP_SSP_1_RXD */
230  PAD_CFG_GPI(GPIO_117, DN_20K, DEEP), /* GP_SSP_1_TXD */
231 
232  /* SIO_SPI_2 -- unused */
233  PAD_CFG_GPI(GPIO_118, UP_20K, DEEP), /* GP_SSP_2_CLK */
234  PAD_CFG_GPI(GPIO_119, DN_20K, DEEP), /* GP_SSP_2_FS0 */
235  PAD_CFG_GPI(GPIO_120, DN_20K, DEEP), /* GP_SSP_2_FS1 */
236  PAD_CFG_GPI(GPIO_121, DN_20K, DEEP), /* GP_SSP_2_FS2 */
237  PAD_CFG_GPI(GPIO_122, DN_20K, DEEP), /* GP_SSP_2_RXD */
238  PAD_CFG_GPI(GPIO_123, DN_20K, DEEP), /* GP_SSP_2_TXD */
239 
240  /* North Community */
241 
242  PAD_CFG_GPI(GPIO_0, DN_20K, DEEP),
243  /* GPIO_1 in early_gpio_table */
244  PAD_CFG_GPI(GPIO_2, DN_20K, DEEP),
245  /* GPIO_3,4 in early_gpio_table */
246  PAD_CFG_GPI(GPIO_5, DN_20K, DEEP), /* TRACE_0_DATA4_VNN */
247  PAD_CFG_GPI(GPIO_6, DN_20K, DEEP), /* TRACE_0_DATA5_VNN */
248  PAD_CFG_GPO(GPIO_7, 0, DEEP),
249  PAD_CFG_GPI(GPIO_8, DN_20K, DEEP),
250  PAD_CFG_GPI(GPIO_9, DN_20K, DEEP),
251  PAD_CFG_GPI(GPIO_10, DN_20K, DEEP),
252  PAD_CFG_GPI(GPIO_11, DN_20K, DEEP),
253  PAD_CFG_GPI(GPIO_12, DN_20K, DEEP),
254  PAD_CFG_GPI(GPIO_13, DN_20K, DEEP),
255  PAD_CFG_GPI(GPIO_14, DN_20K, DEEP),
256  PAD_CFG_GPI(GPIO_15, DN_20K, DEEP),
257  PAD_CFG_GPI(GPIO_16, DN_20K, DEEP),
258  PAD_CFG_GPI(GPIO_17, DN_20K, DEEP),
259  PAD_CFG_GPI(GPIO_18, DN_20K, DEEP),
260  PAD_CFG_GPI(GPIO_19, DN_20K, DEEP),
261  PAD_CFG_GPI(GPIO_20, DN_20K, DEEP),
262  PAD_CFG_GPO(GPIO_21, 0, DEEP), /* activate SMARC Ethernetmac 2 */
263  PAD_CFG_GPO(GPIO_22, 0, DEEP), /* activate SMARC Ethernetmac 1 */
264  PAD_CFG_GPI(GPIO_23, DN_20K, DEEP), /* pin open */
265  PAD_CFG_GPI(GPIO_24, DN_20K, DEEP), /* pin open */
266  PAD_CFG_GPI(GPIO_25, DN_20K, DEEP), /* pin open */
267  PAD_CFG_NF(GPIO_26, UP_20K, DEEP, NF5), /* SATA_LEDN */
268  PAD_CFG_GPI(GPIO_27, DN_20K, DEEP), /* pin open */
269  PAD_CFG_GPO(GPIO_28, 1, DEEP), /* disable SMARC HDMI */
270  PAD_CFG_GPO(GPIO_29, 0, DEEP),
271  PAD_CFG_GPI(GPIO_30, DN_20K, DEEP), /* pin open */
272  PAD_CFG_GPI(GPIO_31, DN_20K, DEEP), /* pin open */
273  PAD_CFG_GPI(GPIO_32, DN_20K, DEEP), /* pin open */
274  PAD_CFG_GPI(GPIO_33, DN_20K, DEEP), /* pin open */
275  PAD_CFG_GPI(GPIO_34, DN_20K, DEEP), /* pin open */
276  PAD_CFG_GPI(GPIO_35, DN_20K, DEEP), /* pin open */
277  PAD_CFG_GPI(GPIO_36, DN_20K, DEEP), /* pin open */
278  PAD_CFG_GPI(GPIO_37, DN_20K, DEEP), /* pin open */
279  PAD_CFG_GPI(GPIO_38, DN_20K, DEEP), /* pin open */
280  PAD_CFG_GPI(GPIO_39, DN_20K, DEEP), /* pin open */
281  PAD_CFG_GPI(GPIO_40, DN_20K, DEEP), /* pin open */
282 
283  /* LPSS_UART[0:2] */
284  PAD_CFG_GPI(GPIO_41, DN_20K, DEEP), /* pin open */
285  /* GPIO_42/43 are in early_gpio_table */
286  PAD_CFG_GPI(GPIO_44, DN_20K, DEEP), /* LPSS_UART1_RTS - unused */
287  PAD_CFG_GPI(GPIO_45, DN_20K, DEEP), /* LPSS_UART1_CTS - unused */
288  /* GPIO_46/47 are in early_gpio_table */
289  PAD_CFG_GPI(GPIO_48, DN_20K, DEEP), /* LPSS_UART2_RTS - unused */
290  PAD_CFG_GPI(GPIO_49, DN_20K, DEEP), /* LPSS_UART2_CTS - unused */
291 
292  /* Camera interface -- completely unused. */
293  PAD_CFG_GPI(GPIO_62, DN_20K, DEEP), /* pin open */
294  PAD_CFG_GPI(GPIO_63, DN_20K, DEEP), /* pin open */
295  PAD_CFG_GPI(GPIO_64, DN_20K, DEEP), /* pin open */
296  PAD_CFG_GPI(GPIO_65, DN_20K, DEEP), /* pin open */
297  PAD_CFG_GPI(GPIO_66, DN_20K, DEEP), /* pin open */
298  PAD_CFG_GPI(GPIO_67, DN_20K, DEEP), /* pin open */
299  PAD_CFG_GPO(GPIO_68, 0, DEEP), /* APL4 Testpoint P403 */
300  PAD_CFG_GPO(GPIO_69, 0, DEEP), /* APL4 Testpoint P404 */
301  PAD_CFG_GPI(GPIO_70, DN_20K, DEEP), /* pin open */
302  PAD_CFG_GPO(GPIO_71, 1, DEEP), /* XCHC_UPD_REQ */
303  PAD_CFG_GPO(GPIO_72, 0, DEEP), /* APL4 Testpoint P402 */
304  PAD_CFG_GPI(GPIO_73, DN_20K, DEEP), /* pin open */
305 
306  /* no TAP controller pins available on SMARC of APL4 */
307  PAD_CFG_NF(TCK, DN_20K, DEEP, NF1), /* pin open */
308  PAD_CFG_NF(TRST_B, DN_20K, DEEP, NF1), /* pin open */
309  PAD_CFG_NF(TMS, DN_20K, DEEP, NF1), /* pin open */
310  PAD_CFG_NF(TDI, DN_20K, DEEP, NF1), /* pin open */
311 
312  PAD_CFG_NF(CX_PMODE, DN_20K, DEEP, NF1), /* pin open */
313  PAD_CFG_NF(CX_PREQ_B, DN_20K, DEEP, NF1), /* pin open */
314  PAD_CFG_NF(JTAGX, DN_20K, DEEP, NF1), /* pin open */
315  PAD_CFG_NF(CX_PRDY_B, DN_20K, DEEP, NF1), /* pin open */
316  PAD_CFG_NF(TDO, DN_20K, DEEP, NF1), /* pin open */
317 
318  /* GPIO_[216:219] described into EDS Vol1. */
319  PAD_CFG_GPO(CNV_BRI_DT, 0, DEEP), /* Disable eDP to LVDS bridge */
320  PAD_CFG_GPI(CNV_BRI_RSP, UP_20K, DEEP),
321  PAD_CFG_GPI(CNV_RGI_DT, DN_20K, DEEP), /* pin open */
322 
323  /* Writing to following GPIO registers leads to 0xFFFF FFFF in CFG0/1 */
324  PAD_CFG_NF(CNV_RGI_RSP, DN_20K, DEEP, NF1), /* pin open */
325 
326  /* Serial Voltage Identification */
327  PAD_CFG_NF(SVID0_ALERT_B, NONE, DEEP, NF1), /* SVID0_ALERT_B */
328  PAD_CFG_NF(SVID0_DATA, UP_20K, DEEP, NF1), /* SVID0_DATA */
329  PAD_CFG_NF(SVID0_CLK, UP_20K, DEEP, NF1), /* SVID0_CLK */
330 };
331 
332 const struct pad_config *variant_gpio_table(size_t *num)
333 {
334  *num = ARRAY_SIZE(gpio_table);
335  return gpio_table;
336 }
337 
338 /* GPIOs needed prior to ramstage. */
339 static const struct pad_config early_gpio_table[] = {
340  /* UART */
341  PAD_CFG_NF(GPIO_46, NATIVE, DEEP, NF1), /* LPSS_UART2_RXD */
342  PAD_CFG_NF_IOSSTATE(GPIO_47, NATIVE, DEEP, NF1, Tx1RxDCRx0), /* LPSS_UART2_TXD */
343 
344  /* Southwest Community */
345 
346  /* Multiplexed I2C7 */
347  PAD_CFG_NF(SMB_ALERTB, UP_20K, DEEP, NF2),
348  PAD_CFG_NF(SMB_CLK, UP_20K, DEEP, NF2),
349  PAD_CFG_NF(SMB_DATA, UP_20K, DEEP, NF2),
350 
351  /* get LPC Bus early working */
352  PAD_CFG_NF(LPC_ILB_SERIRQ, UP_20K, DEEP, NF1),
353  PAD_CFG_NF(LPC_CLKOUT0, NONE, DEEP, NF1),
354  PAD_CFG_NF(LPC_CLKOUT1, NONE, DEEP, NF1),
355  PAD_CFG_NF(LPC_AD0, UP_20K, DEEP, NF1),
356  PAD_CFG_NF(LPC_AD1, UP_20K, DEEP, NF1),
357  PAD_CFG_NF(LPC_AD2, UP_20K, DEEP, NF1),
358  PAD_CFG_NF(LPC_AD3, UP_20K, DEEP, NF1),
359  PAD_CFG_NF(LPC_CLKRUNB, UP_20K, DEEP, NF1),
360  PAD_CFG_NF(LPC_FRAMEB, UP_20K, DEEP, NF1),
361 
362  /* North Community */
363  PAD_CFG_GPO(GPIO_1, 1, DEEP), /* XPCIE_A_RST */
364  PAD_CFG_GPO(GPIO_3, 1, DEEP), /* XPCIE_B_RST */
365  PAD_CFG_GPO(GPIO_4, 1, DEEP), /* XPCIE_C_RST */
366 
367  /* UARTs for early coreboot output */
368  PAD_CFG_NF(GPIO_42, UP_20K, DEEP, NF1), /* LPSS_UART1_RXD */
369  PAD_CFG_NF(GPIO_43, UP_20K, DEEP, NF1), /* LPSS_UART1_TXD */
370  PAD_CFG_NF(GPIO_46, UP_20K, DEEP, NF1), /* LPSS_UART2_RXD */
371  PAD_CFG_NF(GPIO_47, UP_20K, DEEP, NF1), /* LPSS_UART2_TXD */
372 
373  PAD_CFG_NF(PMU_SUSCLK, NONE, DEEP, NF1),/* 32,78 kHz used on SMARC */
374 };
375 
376 const struct pad_config *variant_early_gpio_table(size_t *num)
377 {
379  return early_gpio_table;
380 }
#define GPIO_10
Definition: gpio_ftns.h:12
#define GPIO_191
Definition: gpio_ftns.h:21
#define GPIO_18
Definition: gpio_ftns.h:17
#define GPIO_17
Definition: gpio_ftns.h:16
#define GPIO_16
Definition: gpio_ftns.h:15
#define GPIO_189
Definition: gpio_ftns.h:19
#define GPIO_11
Definition: gpio_ftns.h:13
#define GPIO_190
Definition: gpio_ftns.h:20
#define GPIO_187
Definition: gpio_ftns.h:18
#define GPIO_15
Definition: gpio_ftns.h:14
#define GPIO_49
Definition: gpio_ftns.h:17
#define GPIO_66
Definition: gpio_ftns.h:25
#define GPIO_64
Definition: gpio_ftns.h:24
#define GPIO_71
Definition: gpio_ftns.h:27
#define GPIO_22
Definition: gpio_ftns.h:14
#define GPIO_32
Definition: gpio_ftns.h:15
#define GPIO_68
Definition: gpio_ftns.h:26
#define GPIO_33
Definition: gpio_ftns.h:16
#define ARRAY_SIZE(a)
Definition: helpers.h:12
#define GPIO_195
Definition: gpio_apl.h:153
#define PMU_SLP_S3_B
Definition: gpio_apl.h:265
#define GPIO_82
Definition: gpio_apl.h:187
#define GPIO_37
Definition: gpio_apl.h:102
#define GPIO_202
Definition: gpio_apl.h:160
#define PMU_SUSCLK
Definition: gpio_apl.h:267
#define PROCHOT_B
Definition: gpio_apl.h:176
#define GPIO_34
Definition: gpio_apl.h:99
#define SVID0_CLK
Definition: gpio_apl.h:142
#define TRST_B
Definition: gpio_apl.h:128
#define PMC_SPI_RXD
Definition: gpio_apl.h:166
#define CNV_RGI_RSP
Definition: gpio_apl.h:139
#define GPIO_214
Definition: gpio_apl.h:172
#define GPIO_178
Definition: gpio_apl.h:300
#define LPC_AD2
Definition: gpio_apl.h:312
#define PMU_PWRBTN_B
Definition: gpio_apl.h:262
#define GPIO_183
Definition: gpio_apl.h:303
#define GPIO_161
Definition: gpio_apl.h:282
#define PMIC_RESET_B
Definition: gpio_apl.h:170
#define FST_SPI_CLK_FB
Definition: gpio_apl.h:205
#define PMU_WAKE_B
Definition: gpio_apl.h:268
#define PMU_PLTRST_B
Definition: gpio_apl.h:261
#define GPIO_152
Definition: gpio_apl.h:246
#define TDI
Definition: gpio_apl.h:130
#define GPIO_48
Definition: gpio_apl.h:113
#define GPIO_213
Definition: gpio_apl.h:171
#define GPIO_169
Definition: gpio_apl.h:290
#define GPIO_201
Definition: gpio_apl.h:159
#define GPIO_210
Definition: gpio_apl.h:251
#define PMC_SPI_CLK
Definition: gpio_apl.h:168
#define LPC_AD0
Definition: gpio_apl.h:310
#define GPIO_127
Definition: gpio_apl.h:227
#define GPIO_207
Definition: gpio_apl.h:275
#define PMIC_I2C_SCL
Definition: gpio_apl.h:177
#define GPIO_165
Definition: gpio_apl.h:286
#define PMC_SPI_FS0
Definition: gpio_apl.h:163
#define GPIO_41
Definition: gpio_apl.h:106
#define GPIO_173
Definition: gpio_apl.h:295
#define OSC_CLK_OUT_1
Definition: gpio_apl.h:255
#define TCK
Definition: gpio_apl.h:127
#define GPIO_197
Definition: gpio_apl.h:155
#define GPIO_175
Definition: gpio_apl.h:297
#define GPIO_206
Definition: gpio_apl.h:274
#define GPIO_209
Definition: gpio_apl.h:250
#define GPIO_83
Definition: gpio_apl.h:188
#define PMU_BATLOW_B
Definition: gpio_apl.h:260
#define GPIO_198
Definition: gpio_apl.h:156
#define SMB_ALERTB
Definition: gpio_apl.h:304
#define GPIO_208
Definition: gpio_apl.h:276
#define GPIO_203
Definition: gpio_apl.h:161
#define GPIO_164
Definition: gpio_apl.h:285
#define PMIC_THERMTRIP_B
Definition: gpio_apl.h:174
#define CNV_BRI_RSP
Definition: gpio_apl.h:137
#define GPIO_151
Definition: gpio_apl.h:245
#define GPIO_168
Definition: gpio_apl.h:289
#define GPIO_111
Definition: gpio_apl.h:211
#define OSC_CLK_OUT_0
Definition: gpio_apl.h:254
#define GPIO_46
Definition: gpio_apl.h:111
#define GPIO_44
Definition: gpio_apl.h:109
#define PMU_RESETBUTTON_B
Definition: gpio_apl.h:263
#define GPIO_199
Definition: gpio_apl.h:157
#define SVID0_DATA
Definition: gpio_apl.h:141
#define TMS
Definition: gpio_apl.h:129
#define GPIO_159
Definition: gpio_apl.h:280
#define GPIO_43
Definition: gpio_apl.h:108
#define GPIO_128
Definition: gpio_apl.h:228
#define GPIO_158
Definition: gpio_apl.h:279
#define GPIO_182
Definition: gpio_apl.h:302
#define GPIO_110
Definition: gpio_apl.h:210
#define SUSPWRDNACK
Definition: gpio_apl.h:270
#define GPIO_174
Definition: gpio_apl.h:296
#define LPC_AD1
Definition: gpio_apl.h:311
#define GPIO_167
Definition: gpio_apl.h:288
#define GPIO_45
Definition: gpio_apl.h:110
#define GPIO_186
Definition: gpio_apl.h:301
#define GPIO_125
Definition: gpio_apl.h:225
#define PMIC_PWRGOOD
Definition: gpio_apl.h:169
#define SVID0_ALERT_B
Definition: gpio_apl.h:140
#define GPIO_47
Definition: gpio_apl.h:112
#define LPC_CLKOUT1
Definition: gpio_apl.h:309
#define GPIO_123
Definition: gpio_apl.h:221
#define GPIO_171
Definition: gpio_apl.h:292
#define GPIO_166
Definition: gpio_apl.h:287
#define SMB_DATA
Definition: gpio_apl.h:306
#define PMU_SLP_S4_B
Definition: gpio_apl.h:266
#define GPIO_194
Definition: gpio_apl.h:152
#define PMIC_I2C_SDA
Definition: gpio_apl.h:178
#define GPIO_62
Definition: gpio_apl.h:115
#define GPIO_73
Definition: gpio_apl.h:126
#define GPIO_177
Definition: gpio_apl.h:299
#define PMC_SPI_FS2
Definition: gpio_apl.h:165
#define SMB_CLK
Definition: gpio_apl.h:305
#define GPIO_172
Definition: gpio_apl.h:293
#define LPC_AD3
Definition: gpio_apl.h:313
#define GPIO_193
Definition: gpio_apl.h:151
#define GPIO_204
Definition: gpio_apl.h:162
#define GPIO_211
Definition: gpio_apl.h:252
#define GPIO_200
Definition: gpio_apl.h:158
#define GPIO_150
Definition: gpio_apl.h:244
#define SUS_STAT_B
Definition: gpio_apl.h:269
#define TDO
Definition: gpio_apl.h:135
#define OSC_CLK_OUT_3
Definition: gpio_apl.h:257
#define JTAGX
Definition: gpio_apl.h:133
#define GPIO_63
Definition: gpio_apl.h:116
#define GPIO_149
Definition: gpio_apl.h:243
#define GPIO_205
Definition: gpio_apl.h:273
#define PMU_SLP_S0_B
Definition: gpio_apl.h:264
#define GPIO_196
Definition: gpio_apl.h:154
#define GPIO_162
Definition: gpio_apl.h:283
#define GPIO_163
Definition: gpio_apl.h:284
#define CNV_RGI_DT
Definition: gpio_apl.h:138
#define GPIO_160
Definition: gpio_apl.h:281
#define GPIO_215
Definition: gpio_apl.h:173
#define PMC_SPI_TXD
Definition: gpio_apl.h:167
#define GPIO_188
Definition: gpio_apl.h:146
#define GPIO_192
Definition: gpio_apl.h:150
#define PMC_SPI_FS1
Definition: gpio_apl.h:164
#define GPIO_212
Definition: gpio_apl.h:253
#define PMU_AC_PRESENT
Definition: gpio_apl.h:259
#define LPC_CLKRUNB
Definition: gpio_apl.h:314
#define LPC_FRAMEB
Definition: gpio_apl.h:315
#define LPC_ILB_SERIRQ
Definition: gpio_apl.h:307
#define OSC_CLK_OUT_4
Definition: gpio_apl.h:258
#define GPIO_112
Definition: gpio_apl.h:212
#define GPIO_170
Definition: gpio_apl.h:291
#define CX_PRDY_B
Definition: gpio_apl.h:134
#define GPIO_176
Definition: gpio_apl.h:298
#define GPIO_36
Definition: gpio_apl.h:101
#define GPIO_35
Definition: gpio_apl.h:100
#define CNV_BRI_DT
Definition: gpio_apl.h:136
#define CX_PMODE
Definition: gpio_apl.h:131
#define GPIO_28
Definition: gpio_apl.h:93
#define CX_PREQ_B
Definition: gpio_apl.h:132
#define LPC_CLKOUT0
Definition: gpio_apl.h:308
#define PMIC_STDBY
Definition: gpio_apl.h:175
#define GPIO_179
Definition: gpio_apl.h:294
#define GPIO_124
Definition: gpio_apl.h:224
#define OSC_CLK_OUT_2
Definition: gpio_apl.h:256
const struct pad_config * variant_early_gpio_table(size_t *num)
Definition: gpio.c:204
const struct pad_config *__weak variant_gpio_table(size_t *num)
Definition: gpio.c:406
const struct pad_config early_gpio_table[]
Definition: gpio.c:373
static const struct pad_config gpio_table[]
Definition: gpio.c:11
#define GPIO_91
Definition: gpio.h:67
#define GPIO_30
Definition: gpio.h:46
#define GPIO_121
Definition: gpio.h:80
#define GPIO_76
Definition: gpio.h:59
#define GPIO_27
Definition: gpio.h:44
#define GPIO_0
Definition: gpio.h:21
#define GPIO_7
Definition: gpio.h:28
#define GPIO_90
Definition: gpio.h:66
#define GPIO_89
Definition: gpio.h:65
#define GPIO_69
Definition: gpio.h:55
#define GPIO_12
Definition: gpio.h:33
#define GPIO_1
Definition: gpio.h:22
#define GPIO_5
Definition: gpio.h:26
#define GPIO_113
Definition: gpio.h:75
#define GPIO_104
Definition: gpio.h:69
#define GPIO_130
Definition: gpio.h:84
#define GPIO_88
Definition: gpio.h:64
#define GPIO_84
Definition: gpio.h:60
#define GPIO_105
Definition: gpio.h:70
#define GPIO_8
Definition: gpio.h:29
#define GPIO_67
Definition: gpio.h:53
#define GPIO_24
Definition: gpio.h:42
#define GPIO_132
Definition: gpio.h:86
#define GPIO_147
Definition: gpio.h:94
#define GPIO_4
Definition: gpio.h:25
#define GPIO_129
Definition: gpio.h:83
#define GPIO_148
Definition: gpio.h:95
#define GPIO_20
Definition: gpio.h:38
#define GPIO_92
Definition: gpio.h:68
#define GPIO_19
Definition: gpio.h:37
#define GPIO_70
Definition: gpio.h:56
#define GPIO_116
Definition: gpio.h:78
#define GPIO_109
Definition: gpio.h:74
#define GPIO_31
Definition: gpio.h:47
#define GPIO_9
Definition: gpio.h:30
#define GPIO_26
Definition: gpio.h:43
#define GPIO_131
Definition: gpio.h:85
#define GPIO_29
Definition: gpio.h:45
#define GPIO_75
Definition: gpio.h:58
#define GPIO_86
Definition: gpio.h:62
#define GPIO_87
Definition: gpio.h:63
#define GPIO_3
Definition: gpio.h:24
#define GPIO_146
Definition: gpio.h:93
#define GPIO_120
Definition: gpio.h:79
#define GPIO_106
Definition: gpio.h:71
#define GPIO_85
Definition: gpio.h:61
#define GPIO_2
Definition: gpio.h:23
#define GPIO_21
Definition: gpio.h:39
#define GPIO_40
Definition: gpio.h:49
#define GPIO_42
Definition: gpio.h:50
#define GPIO_23
Definition: gpio.h:41
#define GPIO_74
Definition: gpio.h:57
#define GPIO_6
Definition: gpio.h:27
#define GPIO_139
Definition: gpio.h:94
#define GPIO_14
Definition: gpio.h:35
#define GPIO_136
Definition: gpio.h:91
#define GPIO_137
Definition: gpio.h:92
#define GPIO_138
Definition: gpio.h:93
#define GPIO_103
Definition: gpio.h:71
#define GPIO_13
Definition: gpio.h:34
#define GPIO_135
Definition: gpio.h:90
#define GPIO_153
Definition: gpio.h:103
#define GPIO_156
Definition: gpio.h:106
#define GPIO_79
Definition: gpio.h:66
#define GPIO_81
Definition: gpio.h:68
#define GPIO_77
Definition: gpio.h:64
#define GPIO_39
Definition: gpio.h:52
#define GPIO_155
Definition: gpio.h:105
#define GPIO_157
Definition: gpio.h:107
#define GPIO_80
Definition: gpio.h:67
#define GPIO_154
Definition: gpio.h:104
#define GPIO_38
Definition: gpio.h:51
#define GPIO_78
Definition: gpio.h:65
#define GPIO_72
Definition: gpio.h:58
#define GPIO_133
Definition: gpio.h:97
#define GPIO_99
Definition: gpio.h:76
#define GPIO_25
Definition: gpio.h:43
#define GPIO_117
Definition: gpio.h:84
#define GPIO_126
Definition: gpio.h:90
#define GPIO_98
Definition: gpio.h:75
#define GPIO_102
Definition: gpio.h:79
#define GPIO_122
Definition: gpio.h:89
#define GPIO_134
Definition: gpio.h:98
#define GPIO_97
Definition: gpio.h:74
#define GPIO_65
Definition: gpio.h:51
#define GPIO_100
Definition: gpio.h:77
#define GPIO_119
Definition: gpio.h:86
#define GPIO_118
Definition: gpio.h:85
#define GPIO_101
Definition: gpio.h:78
#define PAD_CFG_GPI(pad, pull, rst)
Definition: gpio_defs.h:284
#define PAD_CFG_TERM_GPO(pad, val, pull, rst)
Definition: gpio_defs.h:262
#define PAD_CFG_NF(pad, pull, rst, func)
Definition: gpio_defs.h:197
#define PAD_CFG_NF_IOSSTATE(pad, pull, rst, func, iosstate)
Definition: gpio_defs.h:220
#define PAD_CFG_GPO(pad, val, rst)
Definition: gpio_defs.h:247