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dramc_pi_api.h File Reference
#include <soc/dramc_common.h>
#include <soc/dramc_soc.h>
#include <soc/emi.h>
Include dependency graph for dramc_pi_api.h:

Go to the source code of this file.

Data Structures

struct  dqs_perbit_dly
 

Enumerations

enum  { MAX_CLKO_DELAY = 15 }
 
enum  { JMETER_COUNT = 1024 , JMETER_COUNT_N = JMETER_COUNT/10 , JMETER_WAIT_DONE_US = (JMETER_COUNT/52 + 10) }
 
enum  { DLE_TEST_NUM = 4 }
 
enum  {
  RX_WIN = 0 , TX_WIN = 1 , STAGE_SETUP = 0 , STAGE_HOLD = 1 ,
  STAGE_SETUP_RX_WIN = STAGE_SETUP | RX_WIN << 1 , STAGE_SETUP_TX_WIN = STAGE_SETUP | TX_WIN << 1 , STAGE_HOLD_RX_WIN = STAGE_HOLD | RX_WIN << 1 , STAGE_HOLD_TX_WIN = STAGE_HOLD | TX_WIN << 1
}
 
enum  {
  RX_DQ = 0 , RX_DQS , TX_DQ , TX_DQS ,
  TX_DQM
}
 
enum  { AUDIO = 1 , XTALK , ISI }
 
enum  { MEMPLL_INIT = 0 , MEMPLL_REF_LAG , MEMPLL_REF_LEAD }
 
enum  {
  FIRST_DQ_DELAY = 0 , FIRST_DQS_DELAY = 0 , MAX_DQDLY_TAPS = 16 , MAX_TX_DQSDLY_TAPS = 16 ,
  MAX_RX_DQSDLY_TAPS = 64
}
 
enum  { DRAMK_READ = 0 , DRAMK_WRITE = 1 }
 
enum  { ENABLE = 1 , DISABLE = 0 }
 
enum  { DATA_WIDTH_16BIT = 16 , DATA_WIDTH_32BIT = 32 }
 
enum  dram_tw_op { TE_OP_WRITE_READ_CHECK = 0 , TE_OP_READ_CHECK }
 
enum  { DQS_GW_TE_OFFSET = 0x10 , DQS_GW_GOLD_COUNTER_32BIT = 0x20202020 , DQS_GW_PATTERN1 = 0xaa000000 , DQS_GW_PATTERN2 = 0x55000000 }
 
enum  {
  DEFAULT_TEST2_1_CAL = 0x55000000 , DEFAULT_TEST2_2_CAL = 0xaa000400 , DEFAULT_TEST2_1_DQSIEN = 0x55000000 , DEFAULT_TEST2_2_DQSIEN = 0xaa000010 ,
  DEFAULT_GOLD_DQSIEN = 0x20202020
}
 
enum  {
  TEST_ISI_PATTERN = 0 , TEST_AUDIO_PATTERN , TEST_TA1_SIMPLE , TEST_TESTPAT4 ,
  TEST_TESTPAT4_3 , TEST_XTALK_PATTERN , TEST_MIX_PATTERN
}
 

Functions

void transfer_to_spm_control (void)
 
void transfer_to_reg_control (void)
 
void dramc_phy_reset (u32 channel)
 
void clk_duty_cal (u32 channel)
 
void div2_phase_sync (void)
 
void dramc_runtime_config (u32 channel, const struct mt8173_sdram_params *sdram_params)
 
void dramc_rankinctl_config (u32 channel, const struct mt8173_sdram_params *sdram_params)
 
void mem_pll_init (const struct mt8173_sdram_params *sdram_params)
 
void dramc_init (u32 channel, const struct mt8173_sdram_params *sdram_params)
 
void dramc_pre_init (u32 channel, const struct mt8173_sdram_params *sdram_params)
 
void tx_window_perbit_cal (u32 channel)
 
void rx_window_perbit_cal (u32 channel)
 
void perbit_window_cal (u32 channel, u8 type)
 
void sw_impedance_cal (u32 channel, const struct mt8173_sdram_params *sdram_params)
 
void ca_training (u32 channel, const struct mt8173_sdram_params *sdram_params)
 
void rx_dqs_gating_cal (u32 channel, u8 rank, const struct mt8173_sdram_params *sdram_params)
 
void dual_rank_rx_datlat_cal (u32 channel, const struct mt8173_sdram_params *sdram_params)
 
void dual_rank_rx_dqs_gating_cal (u32 channel, const struct mt8173_sdram_params *sdram_params)
 
void write_leveling (u32 channel, const struct mt8173_sdram_params *sdram_params)
 
u8 dramk_calcu_best_dly (u8 bit, struct dqs_perbit_dly *p, u8 *p_max_byte)
 
u8 is_dual_rank (u32 channel, const struct mt8173_sdram_params *sdram_params)
 
u8 rx_datlat_cal (u32 channel, u8 rank, const struct mt8173_sdram_params *sdram_params)
 
u32 dram_k_perbit (u32 channel)
 
u32 dramc_engine2 (u32 channel, enum dram_tw_op wr, u32 test2_1, u32 test2_2, u8 testaudpat, u8 log2loopcount)
 
void dramk_check_dqs_win (struct dqs_perbit_dly *p, u8 dly_step, u8 last_step, u32 fail_bit)
 
void dramk_check_dq_win (struct dqs_perbit_dly *p, u8 dly_step, u8 last_step, u32 fail_bit)
 
void tx_delay_for_wrleveling (u32 channel, struct dqs_perbit_dly *dqdqs_perbit_dly, u8 *ave_dqdly_byte, u8 *max_dqsdly_byte)
 

Enumeration Type Documentation

◆ anonymous enum

anonymous enum
Enumerator
MAX_CLKO_DELAY 

Definition at line 10 of file dramc_pi_api.h.

◆ anonymous enum

anonymous enum
Enumerator
JMETER_COUNT 
JMETER_COUNT_N 
JMETER_WAIT_DONE_US 

Definition at line 14 of file dramc_pi_api.h.

◆ anonymous enum

anonymous enum
Enumerator
DLE_TEST_NUM 

Definition at line 22 of file dramc_pi_api.h.

◆ anonymous enum

anonymous enum
Enumerator
RX_WIN 
TX_WIN 
STAGE_SETUP 
STAGE_HOLD 
STAGE_SETUP_RX_WIN 
STAGE_SETUP_TX_WIN 
STAGE_HOLD_RX_WIN 
STAGE_HOLD_TX_WIN 

Definition at line 26 of file dramc_pi_api.h.

◆ anonymous enum

anonymous enum
Enumerator
RX_DQ 
RX_DQS 
TX_DQ 
TX_DQS 
TX_DQM 

Definition at line 40 of file dramc_pi_api.h.

◆ anonymous enum

anonymous enum
Enumerator
AUDIO 
XTALK 
ISI 

Definition at line 48 of file dramc_pi_api.h.

◆ anonymous enum

anonymous enum
Enumerator
MEMPLL_INIT 
MEMPLL_REF_LAG 
MEMPLL_REF_LEAD 

Definition at line 54 of file dramc_pi_api.h.

◆ anonymous enum

anonymous enum
Enumerator
FIRST_DQ_DELAY 
FIRST_DQS_DELAY 
MAX_DQDLY_TAPS 
MAX_TX_DQSDLY_TAPS 
MAX_RX_DQSDLY_TAPS 

Definition at line 60 of file dramc_pi_api.h.

◆ anonymous enum

anonymous enum
Enumerator
DRAMK_READ 
DRAMK_WRITE 

Definition at line 68 of file dramc_pi_api.h.

◆ anonymous enum

anonymous enum
Enumerator
ENABLE 
DISABLE 

Definition at line 73 of file dramc_pi_api.h.

◆ anonymous enum

anonymous enum
Enumerator
DATA_WIDTH_16BIT 
DATA_WIDTH_32BIT 

Definition at line 78 of file dramc_pi_api.h.

◆ anonymous enum

anonymous enum
Enumerator
DQS_GW_TE_OFFSET 
DQS_GW_GOLD_COUNTER_32BIT 
DQS_GW_PATTERN1 
DQS_GW_PATTERN2 

Definition at line 88 of file dramc_pi_api.h.

◆ anonymous enum

anonymous enum
Enumerator
DEFAULT_TEST2_1_CAL 
DEFAULT_TEST2_2_CAL 
DEFAULT_TEST2_1_DQSIEN 
DEFAULT_TEST2_2_DQSIEN 
DEFAULT_GOLD_DQSIEN 

Definition at line 95 of file dramc_pi_api.h.

◆ anonymous enum

anonymous enum
Enumerator
TEST_ISI_PATTERN 
TEST_AUDIO_PATTERN 
TEST_TA1_SIMPLE 
TEST_TESTPAT4 
TEST_TESTPAT4_3 
TEST_XTALK_PATTERN 
TEST_MIX_PATTERN 

Definition at line 109 of file dramc_pi_api.h.

◆ dram_tw_op

enum dram_tw_op
Enumerator
TE_OP_WRITE_READ_CHECK 
TE_OP_READ_CHECK 

Definition at line 83 of file dramc_pi_api.h.

Function Documentation

◆ ca_training()

◆ clk_duty_cal()

void clk_duty_cal ( u32  channel)

Definition at line 607 of file dramc_pi_calibration_api.c.

References ch, clrsetbits32, ddrphy_regs, dramc_dbg, dramc_ddrphy_regs::phyclkduty, PHYCLKDUTY_CMDCLKP0DUTYN_SHIFT, PHYCLKDUTY_CMDCLKP0DUTYP_SHIFT, PHYCLKDUTY_CMDCLKP0DUTYSEL_SHIFT, and read32().

Referenced by do_calib().

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◆ div2_phase_sync()

void div2_phase_sync ( void  )

Definition at line 651 of file dramc_pi_basic_api.c.

References ch, CHANNEL_B, clrbits32, ddrphy_regs, MEMCLKENB_SHIFT, dramc_ddrphy_regs::mempll_divider, setbits32, and udelay().

Referenced by init_dram(), and mem_pll_init().

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◆ dram_k_perbit()

u32 dram_k_perbit ( u32  channel)

Definition at line 447 of file dramc_pi_calibration_api.c.

References DEFAULT_TEST2_1_CAL, DEFAULT_TEST2_2_CAL, dramc_engine2(), and TE_OP_WRITE_READ_CHECK.

Referenced by dramc_window_perbit_cal_partial(), and perbit_window_cal().

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◆ dramc_engine2()

◆ dramc_init()

void dramc_init ( u32  channel,
const struct mt8173_sdram_params sdram_params 
)

Definition at line 451 of file dramc_pi_basic_api.c.

References dramc_ao_regs::actim0, dramc_ao_regs::actim1, ao_regs, dramc_ao_regs::arbctl0, assert, ch, dramc_ao_regs::clk1delay, dramc_ao_regs::clkctl, clrbits32, dramc_ao_regs::conf1, dramc_ao_regs::conf2, dramc_ao_regs::ddr2ctl, dramc_ddrphy_regs::ddr2ctl, ddrphy_regs, DEFAULT_DRIVING, dramc_ao_regs::dllconf, dramc_ao_regs::dqidly, DQS_BIT_NUMBER, dramc_ao_regs::dqscal0, dramc_ddrphy_regs::dqscal0, dramc_ao_regs::dqsctl1, dramc_ao_regs::dqsctl2, dramc_ddrphy_regs::dqsgctl, dramc_ao_regs::dqsien, dramc_ddrphy_regs::dqsisel, dramc_ao_regs::dramc_pd_ctrl, dramc_set_mrs_value(), DRIVING_DS2_0, dramc_ao_regs::drvctl1, dramc_ddrphy_regs::drvctl1, dramc_ao_regs::dummy, dramc_ao_regs::gddr3ctl1, dramc_ddrphy_regs::gddr3ctl1, dramc_ddrphy_regs::ioctl, dramc_ao_regs::iodrv6, is_dual_rank(), dramc_ao_regs::mckdly, dramc_ddrphy_regs::mckdly, dramc_ao_regs::misc, dramc_ao_regs::misctl0, dramc_ddrphy_regs::misctl0, dramc_ao_regs::ocdk, dramc_ddrphy_regs::ocdk, dramc_ddrphy_regs::padctl1, dramc_ddrphy_regs::padctl2, dramc_ao_regs::padctl4, dramc_ao_regs::padctl7, dramc_ao_regs::perfctl0, dramc_ddrphy_regs::peri, dramc_ddrphy_regs::phyclkduty, dramc_ao_regs::phyctl1, dramc_ao_regs::r0deldly, dramc_ao_regs::r1deldly, dramc_ao_regs::rkcfg, mt8173_calib_params::rx_dq_dly, mt8173_calib_params::rx_dqs_dly, setbits32, dramc_ddrphy_regs::tdsel, dramc_ao_regs::test2_3, dramc_ao_regs::test2_4, udelay(), dramc_ao_regs::wodt, write32(), and dramc_ao_regs::zqcs.

Referenced by dfs_init_for_calibration(), and init_dram().

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◆ dramc_phy_reset()

void dramc_phy_reset ( u32  channel)

Definition at line 661 of file dramc_pi_basic_api.c.

References ao_regs, ch, clrbits32, ddrphy_regs, dramc_ao_regs::gddr3ctl1, GDDR3CTL1_RDATRST_SHIFT, dramc_ddrphy_regs::phyctl1, PHYCTL1_PHYRST_SHIFT, setbits32, and udelay().

Referenced by dqs_gw_counter_reset(), and perbit_window_cal().

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◆ dramc_pre_init()

void dramc_pre_init ( u32  channel,
const struct mt8173_sdram_params sdram_params 
)

◆ dramc_rankinctl_config()

void dramc_rankinctl_config ( u32  channel,
const struct mt8173_sdram_params sdram_params 
)

Definition at line 426 of file dramc_pi_calibration_api.c.

References ao_regs, ch, clrsetbits32, dramc_ao_regs::dqscal1, dramc_ao_regs::dummy, is_dual_rank(), MIN, opt_gw_coarse_value, dramc_ao_regs::rkcfg, RKCFG_PBREF_DISBYRATE_SHIFT, setbits32, and value.

Referenced by do_calib().

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◆ dramc_runtime_config()

void dramc_runtime_config ( u32  channel,
const struct mt8173_sdram_params sdram_params 
)

Definition at line 680 of file dramc_pi_basic_api.c.

References ao_regs, BIT, ch, CHANNEL_A, clrbits32, dramc_ddrphy_regs::ddrphy_cg_ctrl, ddrphy_regs, die(), dramc_ao_regs::dqscal0, DQSCAL0_STBCALEN_SHIFT, dramc_ddrphy_regs::dqsgctl, dramc_ao_regs::dummy, MHz, dramc_ao_regs::perfctl0, setbits32, and dramc_ao_regs::spcmd.

Referenced by after_calib(), and do_calib().

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◆ dramk_calcu_best_dly()

◆ dramk_check_dq_win()

void dramk_check_dq_win ( struct dqs_perbit_dly p,
u8  dly_step,
u8  last_step,
u32  fail_bit 
)

◆ dramk_check_dqs_win()

void dramk_check_dqs_win ( struct dqs_perbit_dly p,
u8  dly_step,
u8  last_step,
u32  fail_bit 
)

◆ dual_rank_rx_datlat_cal()

void dual_rank_rx_datlat_cal ( u32  channel,
const struct mt8173_sdram_params sdram_params 
)

Definition at line 651 of file dramc_pi_calibration_api.c.

References ao_regs, ch, clrbits32, dramc_dbg, MASK_RKCFG_RKSWAP_EN, opt_gw_coarse_value, opt_gw_fine_value, dramc_ao_regs::rkcfg, rx_datlat_cal(), set_dle_factor(), set_gw_coarse_factor(), set_gw_fine_factor(), and setbits32.

Referenced by do_calib().

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◆ dual_rank_rx_dqs_gating_cal()

void dual_rank_rx_dqs_gating_cal ( u32  channel,
const struct mt8173_sdram_params sdram_params 
)

◆ is_dual_rank()

u8 is_dual_rank ( u32  channel,
const struct mt8173_sdram_params sdram_params 
)
inline

Definition at line 24 of file dramc_pi_basic_api.c.

Referenced by do_calib(), dramc_init(), dramc_rankinctl_config(), and set_rank_info_to_conf().

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◆ mem_pll_init()

◆ perbit_window_cal()

◆ rx_datlat_cal()

u8 rx_datlat_cal ( u32  channel,
u8  rank,
const struct mt8173_sdram_params sdram_params 
)

Definition at line 694 of file dramc_pi_calibration_api.c.

References ao_regs, BIOS_ERR, ch, clrbits32, DEFAULT_TEST2_1_CAL, DEFAULT_TEST2_2_CAL, DLE_TEST_NUM, dramc_dbg, dramc_engine2(), dramc_ao_regs::mckdly, MCKDLY_DQIENLAT_SHIFT, MCKDLY_DQIENQKEND_SHIFT, printk, set_dle_factor(), and TE_OP_WRITE_READ_CHECK.

Referenced by do_calib(), and dual_rank_rx_datlat_cal().

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◆ rx_dqs_gating_cal()

◆ rx_window_perbit_cal()

void rx_window_perbit_cal ( u32  channel)

◆ sw_impedance_cal()

◆ transfer_to_reg_control()

void transfer_to_reg_control ( void  )

Definition at line 740 of file dramc_pi_basic_api.c.

References BIT, ch, CHANNEL_A, CHANNEL_B, ddrphy_regs, mtk_apmixed, dramc_ddrphy_regs::peri, setbits32, val, and write32().

Referenced by do_calib().

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◆ transfer_to_spm_control()

void transfer_to_spm_control ( void  )

Definition at line 722 of file dramc_pi_basic_api.c.

References BIT, ch, CHANNEL_A, CHANNEL_B, clrbits32, ddrphy_regs, mtk_apmixed, and dramc_ddrphy_regs::peri.

Referenced by do_calib().

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◆ tx_delay_for_wrleveling()

void tx_delay_for_wrleveling ( u32  channel,
struct dqs_perbit_dly dqdqs_perbit_dly,
u8 ave_dqdly_byte,
u8 max_dqsdly_byte 
)

Definition at line 745 of file dramc_pi_calibration_api.c.

References dqs_perbit_dly::best_dqdly, BIOS_ERR, DATA_WIDTH_32BIT, DQS_BIT_NUMBER, dramc_dbg, MAX_DQDLY_TAPS, printk, and wrlevel_dqs_dly.

Referenced by perbit_window_cal().

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◆ tx_window_perbit_cal()

void tx_window_perbit_cal ( u32  channel)

◆ write_leveling()

void write_leveling ( u32  channel,
const struct mt8173_sdram_params sdram_params 
)

Definition at line 129 of file dramc_pi_calibration_api.c.

References ch, clrsetbits32, ddrphy_regs, dramc_ddrphy_regs::dqodly, DQS_BIT_NUMBER, DQS_NUMBER, dramc_dbg, MASK_PADCTL2_32BIT, dramc_ddrphy_regs::padctl2, PADCTL2_SHIFT, dramc_ddrphy_regs::padctl3, read32(), val, value, sdram_params::wr_level, write32(), and wrlevel_dqs_dly.

Referenced by do_calib().

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