fsp_params.c File Reference

#include <assert.h>
#include <console/console.h>
#include <cpu/intel/cpu_ids.h>
#include <cpu/x86/msr.h>
#include <device/device.h>
#include <fsp/util.h>
#include <intelblocks/cpulib.h>
#include <soc/gpio.h>
#include <soc/iomap.h>
#include <soc/msr.h>
#include <soc/pci_devs.h>
#include <soc/romstage.h>
#include <soc/soc_chip.h>
#include <string.h>

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Functions
static void	soc_memory_init_params (FSP_M_CONFIG *m_cfg, const struct soc_intel_tigerlake_config *config)
void	platform_fsp_memory_init_params_cb (FSPM_UPD *mupd, uint32_t version)
__weak void	mainboard_memory_init_params (FSPM_UPD *mupd)

Function Documentation

mainboard_memory_init_params()

__weak void mainboard_memory_init_params

(

FSPM_UPD *

mupd

)

Definition at line 225 of file fsp_params.c.

References BIOS_DEBUG, and printk.

platform_fsp_memory_init_params_cb()

void platform_fsp_memory_init_params_cb	(	FSPM_UPD *	mupd,
		uint32_t	version
	)

Definition at line 214 of file fsp_params.c.

References config, config_of_soc, FSP_M_CONFIG, mainboard_memory_init_params(), and soc_memory_init_params().

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soc_memory_init_params()

static void soc_memory_init_params ( FSP_M_CONFIG *  m_cfg, const struct soc_intel_tigerlake_config *  config  )

static

Definition at line 18 of file fsp_params.c.

References ARRAY_SIZE, BOARD_TYPE_DESKTOP, BOARD_TYPE_ULT_ULX, config, CONFIG, cpu_get_cpuid(), cpu_id, CPUID_TIGERLAKE_A0, get_valid_prmrr_size(), GFXVT_BASE_ADDRESS, IPUVT_BASE_ADDRESS, is_devfn_enabled(), msr_struct::lo, mask, memcpy(), memset(), MSR_FLEX_RATIO, PCH_DEVFN_HDA, PCH_DEVFN_ISH, PCH_DEVFN_SMBUS, PCH_DEVFN_TRACEHUB, PchSerialIoSkipInit, rdmsr(), SA_DEVFN_CPU_PCIE, SA_DEVFN_IGD, SA_DEVFN_IPU, SA_DEVFN_PEG1, SA_DEVFN_PEG2, SA_DEVFN_PEG3, SA_DEVFN_TBT0, SA_DEVFN_TBT1, SA_DEVFN_TBT2, SA_DEVFN_TBT3, SA_DEVFN_TCSS_DMA0, SA_DEVFN_TCSS_DMA1, SA_DEVFN_TMT, TBT0_BASE_ADDRESS, TBT1_BASE_ADDRESS, TBT2_BASE_ADDRESS, TBT3_BASE_ADDRESS, and VTVC0_BASE_ADDRESS.

Referenced by platform_fsp_memory_init_params_cb().

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