coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
pcie_gpp.c
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1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 
3 #include <acpi/acpi_device.h>
4 #include <acpi/acpigen.h>
5 #include <acpi/acpigen_pci.h>
7 #include <assert.h>
8 #include <device/device.h>
9 #include <device/pci.h>
10 #include <device/pci_ids.h>
11 #include <device/pciexp.h>
12 #include <soc/pci_devs.h>
13 #include <stdio.h>
14 #include <stdlib.h>
15 
16 static const char *pcie_gpp_acpi_name(const struct device *dev)
17 {
18  char *name;
19 
20  if (dev->path.type != DEVICE_PATH_PCI)
21  return NULL;
22 
24  snprintf(name, ACPI_NAME_BUFFER_SIZE, "GP%02X", dev->path.pci.devfn);
25  name[4] = '\0';
26 
27  return name;
28 }
29 
30 static void acpi_device_write_gpp_pci_dev(const struct device *dev)
31 {
32  const char *scope = acpi_device_scope(dev);
33  const char *name = acpi_device_name(dev);
34 
36  assert(name);
37  assert(scope);
38 
39  acpigen_write_scope(scope);
41 
44 
46 
47  acpigen_pop_len(); /* Device */
48  acpigen_pop_len(); /* Scope */
49 }
50 
53  .set_resources = pci_dev_set_resources,
54  .enable_resources = pci_bus_enable_resources,
55  .scan_bus = pci_scan_bridge,
56  .reset_bus = pci_bus_reset,
57  .acpi_name = pcie_gpp_acpi_name,
58  .acpi_fill_ssdt = acpi_device_write_gpp_pci_dev,
59 };
60 
61 static const unsigned short internal_pci_gpp_ids[] = {
66  0
67 };
68 
69 static const struct pci_driver internal_pcie_gpp_driver __pci_driver = {
70  .ops = &internal_pcie_gpp_ops,
71  .vendor = PCI_VID_AMD,
72  .devices = internal_pci_gpp_ids,
73 };
74 
77  .set_resources = pci_dev_set_resources,
78  .enable_resources = pci_bus_enable_resources,
79  .scan_bus = pciexp_scan_bridge,
80  .reset_bus = pci_bus_reset,
81  .acpi_name = pcie_gpp_acpi_name,
82  .acpi_fill_ssdt = acpi_device_write_gpp_pci_dev,
83 };
84 
85 static const unsigned short external_pci_gpp_ids[] = {
90  0
91 };
92 
93 static const struct pci_driver external_pcie_gpp_driver __pci_driver = {
94  .ops = &external_pcie_gpp_ops,
95  .vendor = PCI_VID_AMD,
96  .devices = external_pci_gpp_ids,
97 };
int acpi_device_status(const struct device *dev)
Definition: device.c:193
const char * acpi_device_name(const struct device *dev)
Definition: device.c:49
const char * acpi_device_scope(const struct device *dev)
Definition: device.c:158
void acpigen_pop_len(void)
Definition: acpigen.c:37
void acpigen_write_scope(const char *name)
Definition: acpigen.c:326
void acpigen_write_STA(uint8_t status)
Definition: acpigen.c:783
void acpigen_write_device(const char *name)
Definition: acpigen.c:769
void acpigen_write_ADR_pci_device(const struct device *dev)
Definition: acpigen_pci.c:22
const char * name
Definition: mmu.c:92
#define assert(statement)
Definition: assert.h:74
static const char * pcie_gpp_acpi_name(const struct device *dev)
Definition: pcie_gpp.c:16
static const unsigned short external_pci_gpp_ids[]
Definition: pcie_gpp.c:85
static const unsigned short internal_pci_gpp_ids[]
Definition: pcie_gpp.c:61
static const struct pci_driver internal_pcie_gpp_driver __pci_driver
Definition: pcie_gpp.c:69
static void acpi_device_write_gpp_pci_dev(const struct device *dev)
Definition: pcie_gpp.c:30
static struct device_operations external_pcie_gpp_ops
Definition: pcie_gpp.c:75
static struct device_operations internal_pcie_gpp_ops
Definition: pcie_gpp.c:51
#define ACPI_NAME_BUFFER_SIZE
Definition: acpi.h:59
void * malloc(size_t size)
Definition: malloc.c:53
@ DEVICE_PATH_PCI
Definition: path.h:9
void pci_bus_enable_resources(struct device *dev)
Definition: pci_device.c:758
void pci_bus_read_resources(struct device *dev)
Definition: pci_device.c:540
void pci_bus_reset(struct bus *bus)
Definition: pci_device.c:777
void pci_scan_bridge(struct device *dev)
Scan a PCI bridge and the buses behind the bridge.
Definition: pci_device.c:1598
void pci_dev_set_resources(struct device *dev)
Definition: pci_device.c:691
#define PCI_DID_AMD_FAM17H_MODEL18H_PCIE_GPP_BUSB
Definition: pci_ids.h:591
#define PCI_VID_AMD
Definition: pci_ids.h:496
#define PCI_DID_AMD_FAM17H_MODELA0H_PCIE_GPP_BUSABC
Definition: pci_ids.h:593
#define PCI_DID_AMD_FAM17H_MODEL60H_PCIE_GPP_BUSABC
Definition: pci_ids.h:592
#define PCI_DID_AMD_FAM17H_MODEL60H_PCIE_GPP_D2
Definition: pci_ids.h:588
#define PCI_DID_AMD_FAM17H_MODEL60H_PCIE_GPP_D1
Definition: pci_ids.h:587
#define PCI_DID_AMD_FAM17H_MODEL18H_PCIE_GPP
Definition: pci_ids.h:586
#define PCI_DID_AMD_FAM17H_MODELA0H_PCIE_GPP
Definition: pci_ids.h:589
#define PCI_DID_AMD_FAM17H_MODEL18H_PCIE_GPP_BUSA
Definition: pci_ids.h:590
void pciexp_scan_bridge(struct device *dev)
void acpigen_write_pci_GNB_PRT(const struct device *dev)
Definition: acpi_prt.c:128
#define NULL
Definition: stddef.h:19
void(* read_resources)(struct device *dev)
Definition: device.h:39
struct pci_path pci
Definition: path.h:116
enum device_path_type type
Definition: path.h:114
Definition: device.h:107
struct device_path path
Definition: device.h:115
unsigned int devfn
Definition: path.h:54
int snprintf(char *buf, size_t size, const char *fmt,...)
Note: This file is only for POSIX compatibility, and is meant to be chain-included via string....
Definition: vsprintf.c:35