10 #include <soc/ramstage.h>
20 unsigned int pwm_period, pwm_polarity, pwm_duty;
38 reg32 = ((panel_cfg->
up_delay_ms * 10) & 0x1fff) << 16;
static void write32(void *addr, uint32_t val)
#define DIV_ROUND_UP(x, y)
struct resource * probe_resource(const struct device *dev, unsigned int index)
See if a resource structure already exists for a given index.
static struct tpm_chip chip
#define BXT_BLC_PWM_CTL(controller)
#define BXT_BLC_PWM_POLARITY
#define PCH_PP_OFF_DELAYS
#define BXT_BLC_PWM_FREQ(controller)
#define PANEL_POWER_RESET
#define BXT_BLC_PWM_DUTY(controller)
#define DIV_ROUND_CLOSEST(x, divisor)
static struct resource * mmio_res
#define PCI_BASE_ADDRESS_0
const struct i915_gpu_controller_info * intel_igd_get_controller_info(const struct device *device)
void graphics_soc_panel_init(struct device *const dev)
DEVTREE_CONST void * chip_info
unsigned int backlight_off_delay_ms
unsigned int backlight_on_delay_ms
unsigned int cycle_delay_ms
enum i915_gpu_panel_config::@68 backlight_polarity
unsigned int down_delay_ms
unsigned int backlight_pwm_hz
struct i915_gpu_panel_config panel_cfg