coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
cpxsp_dl_gpio.h
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #ifndef CFG_GPIO_H
4 #define CFG_GPIO_H
5 
6 #include <gpio.h>
7 
8 /* Pad configuration was generated automatically using intelp2m utility */
9 static const struct pad_config gpio_table[] = {
10  /* ------- GPIO Community 0 ------- */
11  /* ------- GPIO Group GPP_A ------- */
12  PAD_CFG_NF(GPP_A0, NONE, RSMRST, NF3), /* ESPI_ALERT1# */
13  PAD_CFG_NF(GPP_A1, NONE, RSMRST, NF1), /* LAD0 */
14  PAD_CFG_NF(GPP_A2, NONE, RSMRST, NF1), /* LAD1 */
15  PAD_CFG_NF(GPP_A3, NONE, RSMRST, NF1), /* LAD2 */
16  PAD_CFG_NF(GPP_A4, NONE, RSMRST, NF1), /* LAD3 */
17  PAD_CFG_NF(GPP_A5, NONE, RSMRST, NF1), /* LFRAME# */
18  PAD_CFG_NF(GPP_A6, NONE, RSMRST, NF1), /* SERIRQ */
19  PAD_CFG_NF(GPP_A7, NONE, RSMRST, NF1), /* PIRQA# */
20  PAD_CFG_NF(GPP_A8, NONE, RSMRST, NF1), /* CLKRUN# */
21  PAD_CFG_NF(GPP_A9, NONE, RSMRST, NF1), /* CLKOUT_LPC0 */
22  PAD_NC(GPP_A10, NONE), /* GPIO */
23  PAD_CFG_NF(GPP_A11, NONE, RSMRST, NF1), /* PME# */
24  PAD_CFG_GPI_SCI(GPP_A12, NONE, RSMRST, OFF, NONE), /* GPIO */
25  PAD_CFG_NF(GPP_A13, NONE, RSMRST, NF1), /* SUSWARN#/SUSPWRDNACK */
26  PAD_NC(GPP_A14, NONE), /* GPIO */
27  PAD_CFG_NF(GPP_A15, NONE, RSMRST, NF1), /* SUS_ACK# */
28  PAD_NC(GPP_A16, NONE), /* GPIO */
29  PAD_NC(GPP_A17, NONE), /* GPIO */
30  PAD_CFG_GPI_TRIG_OWN(GPP_A18, NONE, RSMRST, OFF, ACPI), /* GPIO */
31  /* GPP_A19 - RESERVED */
32  PAD_NC(GPP_A20, NONE), /* GPIO */
33  PAD_NC(GPP_A21, NONE), /* GPIO */
34  PAD_NC(GPP_A22, NONE), /* GPIO */
35  PAD_NC(GPP_A23, NONE), /* GPIO */
36 
37  /* ------- GPIO Group GPP_B ------- */
38  PAD_NC(GPP_B0, NONE), /* GPIO */
39  PAD_NC(GPP_B1, NONE), /* GPIO */
40  PAD_CFG_GPI_TRIG_OWN(GPP_B2, NONE, RSMRST, OFF, ACPI), /* GPIO */
41  PAD_CFG_GPI_TRIG_OWN(GPP_B3, NONE, RSMRST, OFF, ACPI), /* GPIO */
42  PAD_CFG_GPI_TRIG_OWN(GPP_B4, NONE, RSMRST, OFF, ACPI), /* GPIO */
43  PAD_CFG_GPI_TRIG_OWN(GPP_B5, NONE, RSMRST, OFF, ACPI), /* GPIO */
44  PAD_CFG_GPI_TRIG_OWN(GPP_B6, NONE, RSMRST, OFF, ACPI), /* GPIO */
45  PAD_NC(GPP_B7, NONE), /* GPIO */
46  PAD_NC(GPP_B8, NONE), /* GPIO */
47  PAD_CFG_GPI_TRIG_OWN(GPP_B9, NONE, RSMRST, OFF, ACPI), /* GPIO */
48  PAD_CFG_GPI_TRIG_OWN(GPP_B10, NONE, RSMRST, OFF, ACPI), /* GPIO */
49  /* GPP_B11 - RESERVED */
50  PAD_CFG_NF(GPP_B12, NONE, RSMRST, NF1), /* GLB_RST_WARN_N# */
51  PAD_CFG_NF(GPP_B13, NONE, RSMRST, NF1), /* PLTRST# */
52  PAD_CFG_NF(GPP_B14, NONE, RSMRST, NF1), /* SPKR */
53  PAD_CFG_GPI_TRIG_OWN(GPP_B15, NONE, RSMRST, OFF, ACPI), /* GPIO */
54  PAD_CFG_GPI_TRIG_OWN(GPP_B16, NONE, RSMRST, OFF, ACPI), /* GPIO */
55  PAD_CFG_GPI_TRIG_OWN(GPP_B17, NONE, RSMRST, OFF, ACPI), /* GPIO */
56  PAD_CFG_GPI_TRIG_OWN(GPP_B18, NONE, RSMRST, OFF, ACPI), /* GPIO */
57  PAD_CFG_GPI_TRIG_OWN(GPP_B19, NONE, RSMRST, OFF, ACPI), /* GPIO */
58  PAD_CFG_GPO(GPP_B20, 1, RSMRST), /* GPIO */
59  PAD_NC(GPP_B21, NONE), /* GPIO */
60  PAD_CFG_GPI_TRIG_OWN(GPP_B22, NONE, RSMRST, OFF, ACPI), /* GPIO */
61  PAD_CFG_NF(GPP_B23, NONE, RSMRST, NF2), /* PCHHOT# */
62 
63  /* ------- GPIO Group GPP_F ------- */
64  PAD_NC(GPP_F0, NONE), /* GPIO */
65  PAD_NC(GPP_F1, NONE), /* GPIO */
66  PAD_NC(GPP_F2, NONE), /* GPIO */
67  PAD_NC(GPP_F3, NONE), /* GPIO */
68  PAD_CFG_GPI_TRIG_OWN(GPP_F4, NONE, RSMRST, OFF, ACPI), /* GPIO */
69  PAD_CFG_GPI_TRIG_OWN(GPP_F5, NONE, RSMRST, OFF, ACPI), /* GPIO */
70  PAD_CFG_GPO(GPP_F6, 0, RSMRST), /* GPIO */
71  PAD_CFG_GPO(GPP_F7, 0, RSMRST), /* GPIO */
72  PAD_CFG_GPO(GPP_F8, 0, RSMRST), /* GPIO */
73  PAD_CFG_GPI_TRIG_OWN(GPP_F9, NONE, RSMRST, OFF, ACPI), /* GPIO */
74  PAD_NC(GPP_F10, NONE), /* GPIO */
75  PAD_NC(GPP_F11, NONE), /* GPIO */
76  PAD_NC(GPP_F12, NONE), /* GPIO */
77  PAD_NC(GPP_F13, NONE), /* GPIO */
78  PAD_NC(GPP_F14, NONE), /* GPIO */
79  PAD_NC(GPP_F15, NONE), /* GPIO */
80  PAD_NC(GPP_F16, NONE), /* GPIO */
81  PAD_NC(GPP_F17, NONE), /* GPIO */
82  PAD_NC(GPP_F18, NONE), /* GPIO */
83  PAD_NC(GPP_F19, NONE), /* GPIO */
84  PAD_NC(GPP_F20, NONE), /* GPIO */
85  PAD_NC(GPP_F21, NONE), /* GPIO */
86  PAD_NC(GPP_F22, NONE), /* GPIO */
87  PAD_NC(GPP_F23, NONE), /* GPIO */
88 
89  /* ------- GPIO Community 1 ------- */
90  /* ------- GPIO Group GPP_C ------- */
91  /* GPP_C0 - RESERVED */
92  /* GPP_C1 - RESERVED */
93  PAD_CFG_GPI_TRIG_OWN(GPP_C2, NONE, RSMRST, LEVEL, ACPI), /* GPIO */
94  /* GPP_C3 - RESERVED */
95  /* GPP_C4 - RESERVED */
96  PAD_CFG_NF(GPP_C5, NONE, RSMRST, NF1), /* SML0ALERT# */
97  /* GPP_C6 - RESERVED */
98  /* GPP_C7 - RESERVED */
99  PAD_CFG_GPI_TRIG_OWN(GPP_C8, NONE, RSMRST, OFF, ACPI), /* GPIO */
100  PAD_CFG_GPI_TRIG_OWN(GPP_C9, NONE, RSMRST, OFF, ACPI), /* GPIO */
101  PAD_NC(GPP_C10, NONE), /* GPIO */
102  PAD_NC(GPP_C11, NONE), /* GPIO */
103  PAD_CFG_GPI_TRIG_OWN(GPP_C12, NONE, RSMRST, OFF, ACPI), /* GPIO */
104  PAD_CFG_GPI_TRIG_OWN(GPP_C13, NONE, RSMRST, OFF, ACPI), /* GPIO */
105  PAD_CFG_GPI_TRIG_OWN(GPP_C14, NONE, RSMRST, OFF, ACPI), /* GPIO */
106  PAD_NC(GPP_C15, NONE), /* GPIO */
107  PAD_NC(GPP_C16, NONE), /* GPIO */
108  PAD_NC(GPP_C17, NONE), /* GPIO */
109  PAD_NC(GPP_C18, NONE), /* GPIO */
110  PAD_CFG_GPI_TRIG_OWN(GPP_C19, NONE, RSMRST, OFF, ACPI), /* GPIO */
111  /* GPP_C20 - RESERVED */
112  PAD_CFG_GPI_TRIG_OWN(GPP_C21, NONE, RSMRST, OFF, ACPI), /* GPIO */
113  PAD_CFG_GPI_SMI(GPP_C22, NONE, RSMRST, LEVEL, INVERT), /* GPIO */
114  PAD_CFG_GPI_TRIG_OWN(GPP_C23, NONE, RSMRST, OFF, ACPI), /* GPIO */
115 
116  /* ------- GPIO Group GPP_D ------- */
117  PAD_CFG_GPI_NMI(GPP_D0, NONE, RSMRST, LEVEL, NONE), /* GPIO */
118  PAD_NC(GPP_D1, NONE), /* GPIO */
119  PAD_NC(GPP_D2, NONE), /* GPIO */
120  PAD_NC(GPP_D3, NONE), /* GPIO */
121  PAD_CFG_GPO(GPP_D4, 1, RSMRST), /* GPIO */
122  PAD_NC(GPP_D5, NONE), /* GPIO */
123  PAD_NC(GPP_D6, NONE), /* GPIO */
124  PAD_NC(GPP_D7, NONE), /* GPIO */
125  PAD_CFG_GPI_TRIG_OWN(GPP_D8, NONE, RSMRST, OFF, ACPI), /* GPIO */
126  PAD_NC(GPP_D9, NONE), /* GPIO */
127  PAD_NC(GPP_D10, NONE), /* GPIO */
128  PAD_NC(GPP_D11, NONE), /* GPIO */
129  PAD_NC(GPP_D12, NONE), /* GPIO */
130  PAD_NC(GPP_D13, NONE), /* GPIO */
131  PAD_NC(GPP_D14, NONE), /* GPIO */
132  PAD_NC(GPP_D15, NONE), /* GPIO */
133  PAD_CFG_GPO(GPP_D16, 0, RSMRST), /* GPIO */
134  PAD_CFG_GPO(GPP_D17, 0, RSMRST), /* GPIO */
135  PAD_NC(GPP_D18, NONE), /* GPIO */
136  PAD_CFG_GPO(GPP_D19, 0, RSMRST), /* GPIO */
137  PAD_NC(GPP_D20, NONE), /* GPIO */
138  PAD_NC(GPP_D21, NONE), /* GPIO */
139  PAD_NC(GPP_D22, NONE), /* GPIO */
140  PAD_NC(GPP_D23, NONE), /* GPIO */
141 
142  /* ------- GPIO Group GPP_E ------- */
143  PAD_NC(GPP_E0, NONE), /* GPIO */
144  PAD_NC(GPP_E1, NONE), /* GPIO */
145  PAD_NC(GPP_E2, NONE), /* GPIO */
146  PAD_CFG_NF(GPP_E3, NONE, RSMRST, NF1), /* CPU_GP0 */
147  PAD_NC(GPP_E4, NONE), /* GPIO */
148  PAD_NC(GPP_E5, NONE), /* GPIO */
149  PAD_NC(GPP_E6, NONE), /* GPIO */
150  PAD_CFG_GPI_TRIG_OWN(GPP_E7, NONE, RSMRST, OFF, ACPI), /* GPIO */
151  PAD_NC(GPP_E8, NONE), /* GPIO */
152  PAD_CFG_NF(GPP_E9, NONE, RSMRST, NF1), /* USB_OC0# */
153  PAD_NC(GPP_E10, NONE), /* GPIO */
154  PAD_NC(GPP_E11, NONE), /* GPIO */
155  PAD_NC(GPP_E12, NONE), /* GPIO */
156 
157  /* ------- GPIO Community 2 ------- */
158  /* -------- GPIO Group GPD -------- */
159  /* GPD0 - RESERVED */
160  PAD_CFG_NF(GPD1, NONE, RSMRST, NF1), /* ACPRESENT */
161  PAD_NC(GPD2, NONE), /* GPIO */
162  PAD_CFG_NF(GPD3, NONE, RSMRST, NF1), /* PWRBTN# */
163  PAD_CFG_NF(GPD4, NONE, RSMRST, NF1), /* SLP_S3# */
164  PAD_CFG_NF(GPD5, NONE, RSMRST, NF1), /* SLP_S4# */
165  PAD_NC(GPD6, NONE), /* GPIO */
166  PAD_NC(GPD7, NONE), /* GPIO */
167  PAD_NC(GPD8, NONE), /* GPIO */
168  PAD_NC(GPD9, NONE), /* GPIO */
169  PAD_NC(GPD10, NONE), /* GPIO */
170  PAD_NC(GPD11, NONE), /* GPIO */
171 
172  /* ------- GPIO Community 3 ------- */
173  /* ------- GPIO Group GPP_I ------- */
174  PAD_NC(GPP_I0, NONE), /* GPIO */
175  PAD_NC(GPP_I1, NONE), /* GPIO */
176  PAD_NC(GPP_I2, NONE), /* GPIO */
177  PAD_NC(GPP_I3, NONE), /* GPIO */
178  PAD_NC(GPP_I4, NONE), /* GPIO */
179  PAD_NC(GPP_I5, NONE), /* GPIO */
180  PAD_NC(GPP_I6, NONE), /* GPIO */
181  PAD_NC(GPP_I7, NONE), /* GPIO */
182  PAD_CFG_NF(GPP_I8, NONE, RSMRST, NF2), /* PCI_DIS */
183  PAD_CFG_NF(GPP_I9, NONE, RSMRST, NF2), /* LAN_DIS */
184  PAD_NC(GPP_I10, NONE), /* GPIO */
185 
186  /* ------- GPIO Community 4 ------- */
187  /* ------- GPIO Group GPP_J ------- */
188  PAD_NC(GPP_J0, NONE), /* GPIO */
189  PAD_NC(GPP_J1, NONE), /* GPIO */
190  PAD_NC(GPP_J2, NONE), /* GPIO */
191  PAD_NC(GPP_J3, NONE), /* GPIO */
192  PAD_NC(GPP_J4, NONE), /* GPIO */
193  PAD_NC(GPP_J5, NONE), /* GPIO */
194  PAD_NC(GPP_J6, NONE), /* GPIO */
195  PAD_NC(GPP_J7, NONE), /* GPIO */
196  PAD_NC(GPP_J8, NONE), /* GPIO */
197  PAD_NC(GPP_J9, NONE), /* GPIO */
198  PAD_NC(GPP_J10, NONE), /* GPIO */
199  PAD_NC(GPP_J11, NONE), /* GPIO */
200  PAD_NC(GPP_J12, NONE), /* GPIO */
201  PAD_NC(GPP_J13, NONE), /* GPIO */
202  PAD_NC(GPP_J14, NONE), /* GPIO */
203  PAD_NC(GPP_J15, NONE), /* GPIO */
204  PAD_NC(GPP_J16, NONE), /* GPIO */
205  PAD_NC(GPP_J17, NONE), /* GPIO */
206  PAD_NC(GPP_J18, NONE), /* GPIO */
207  PAD_NC(GPP_J19, NONE), /* GPIO */
208  PAD_NC(GPP_J20, NONE), /* GPIO */
209  PAD_NC(GPP_J21, NONE), /* GPIO */
210  PAD_NC(GPP_J22, NONE), /* GPIO */
211  PAD_NC(GPP_J23, NONE), /* GPIO */
212 
213  /* ------- GPIO Group GPP_K ------- */
214  PAD_NC(GPP_K0, NONE), /* GPIO */
215  PAD_NC(GPP_K1, NONE), /* GPIO */
216  PAD_NC(GPP_K2, NONE), /* GPIO */
217  PAD_NC(GPP_K3, NONE), /* GPIO */
218  PAD_NC(GPP_K4, NONE), /* GPIO */
219  PAD_NC(GPP_K5, NONE), /* GPIO */
220  PAD_NC(GPP_K6, NONE), /* GPIO */
221  PAD_CFG_GPI_TRIG_OWN(GPP_K7, NONE, RSMRST, OFF, ACPI), /* GPIO */
222  PAD_CFG_NF(GPP_K8, NONE, RSMRST, NF1), /* LAN_NCSI_ARB_IN */
223  PAD_CFG_NF(GPP_K9, NONE, RSMRST, NF1), /* LAN_NCSI_ARB_OUT */
224  PAD_CFG_NF(GPP_K10, NONE, RSMRST, NF1), /* PE_RST# */
225 
226  /* ------- GPIO Community 5 ------- */
227  /* ------- GPIO Group GPP_G ------- */
228  PAD_NC(GPP_G0, NONE), /* GPIO */
229  PAD_NC(GPP_G1, NONE), /* GPIO */
230  PAD_NC(GPP_G2, NONE), /* GPIO */
231  PAD_NC(GPP_G3, NONE), /* GPIO */
232  PAD_NC(GPP_G4, NONE), /* GPIO */
233  PAD_NC(GPP_G5, NONE), /* GPIO */
234  PAD_NC(GPP_G6, NONE), /* GPIO */
235  PAD_NC(GPP_G7, NONE), /* GPIO */
236  PAD_NC(GPP_G8, NONE), /* GPIO */
237  PAD_NC(GPP_G9, NONE), /* GPIO */
238  PAD_NC(GPP_G10, NONE), /* GPIO */
239  PAD_NC(GPP_G11, NONE), /* GPIO */
240  PAD_CFG_GPI_TRIG_OWN(GPP_G12, NONE, RSMRST, OFF, ACPI), /* GPIO */
241  PAD_CFG_GPI_TRIG_OWN(GPP_G13, NONE, RSMRST, OFF, ACPI), /* GPIO */
242  PAD_CFG_GPI_TRIG_OWN(GPP_G14, NONE, RSMRST, OFF, ACPI), /* GPIO */
243  PAD_CFG_GPI_TRIG_OWN(GPP_G15, NONE, RSMRST, OFF, ACPI), /* GPIO */
244  PAD_CFG_GPI_TRIG_OWN(GPP_G16, NONE, RSMRST, OFF, ACPI), /* GPIO */
245  PAD_CFG_NF(GPP_G17, NONE, RSMRST, NF1), /* ADR_COMPLETE */
246  PAD_CFG_NF(GPP_G18, NONE, RSMRST, NF1), /* NMI# */
247  PAD_CFG_NF(GPP_G19, NONE, RSMRST, NF1), /* SMI# */
248  /* GPP_G20 - RESERVED */
249  PAD_CFG_GPI_TRIG_OWN(GPP_G21, NONE, RSMRST, OFF, ACPI), /* GPIO */
250  PAD_NC(GPP_G22, NONE), /* GPIO */
251  PAD_NC(GPP_G23, NONE), /* GPIO */
252 
253  /* ------- GPIO Group GPP_H ------- */
254  PAD_NC(GPP_H0, NONE), /* GPIO */
255  PAD_CFG_GPI_TRIG_OWN(GPP_H1, NONE, RSMRST, OFF, ACPI), /* GPIO */
256  PAD_NC(GPP_H2, NONE), /* GPIO */
257  PAD_NC(GPP_H3, NONE), /* GPIO */
258  PAD_NC(GPP_H4, NONE), /* GPIO */
259  PAD_NC(GPP_H5, NONE), /* GPIO */
260  PAD_NC(GPP_H6, NONE), /* GPIO */
261  PAD_NC(GPP_H7, NONE), /* GPIO */
262  PAD_NC(GPP_H8, NONE), /* GPIO */
263  PAD_NC(GPP_H9, NONE), /* GPIO */
264  /* GPP_H10 - RESERVED */
265  /* GPP_H11 - RESERVED */
266  PAD_CFG_GPI_TRIG_OWN(GPP_H12, NONE, RSMRST, OFF, ACPI), /* GPIO */
267  /* GPP_H13 - RESERVED */
268  /* GPP_H14 - RESERVED */
269  PAD_CFG_GPI_TRIG_OWN(GPP_H15, NONE, RSMRST, OFF, ACPI), /* GPIO */
270  /* GPP_H16 - RESERVED */
271  /* GPP_H17 - RESERVED */
272  PAD_CFG_GPI_TRIG_OWN(GPP_H18, NONE, RSMRST, OFF, ACPI), /* GPIO */
273  PAD_CFG_GPI_TRIG_OWN(GPP_H19, NONE, RSMRST, OFF, ACPI), /* GPIO */
274  PAD_CFG_NF(GPP_H20, NONE, RSMRST, NF2), /* SSATAXPCIE2 */
275  PAD_CFG_GPI_TRIG_OWN(GPP_H21, NONE, RSMRST, OFF, ACPI), /* GPIO */
276  PAD_NC(GPP_H22, NONE), /* GPIO */
277  PAD_NC(GPP_H23, NONE), /* GPIO */
278 
279  /* ------- GPIO Group GPP_L ------- */
280  /* GPP_L0 - RESERVED */
281  PAD_CFG_NF(GPP_L1, NONE, DEEP, NF1), /* CSME_INTR_OUT */
282  PAD_CFG_NF(GPP_L2, NONE, RSMRST, NF1), /* TESTCH0_D0 */
283  PAD_CFG_NF(GPP_L3, NONE, RSMRST, NF1), /* TESTCH0_D1 */
284  PAD_CFG_NF(GPP_L4, NONE, RSMRST, NF1), /* TESTCH0_D2 */
285  PAD_CFG_NF(GPP_L5, NONE, RSMRST, NF1), /* TESTCH0_D3 */
286  PAD_CFG_NF(GPP_L6, NONE, RSMRST, NF1), /* TESTCH0_D4 */
287  PAD_CFG_NF(GPP_L7, NONE, RSMRST, NF1), /* TESTCH0_D5 */
288  PAD_CFG_NF(GPP_L8, NONE, RSMRST, NF1), /* TESTCH0_D6 */
289  PAD_CFG_NF(GPP_L9, NONE, RSMRST, NF1), /* TESTCH0_D7 */
290  PAD_CFG_NF(GPP_L10, NONE, RSMRST, NF1), /* TESTCH0_CLK */
291  PAD_NC(GPP_L11, NONE), /* GPIO */
292  PAD_NC(GPP_L12, NONE), /* GPIO */
293  PAD_NC(GPP_L13, NONE), /* GPIO */
294  PAD_NC(GPP_L14, NONE), /* GPIO */
295  PAD_NC(GPP_L15, NONE), /* GPIO */
296  PAD_NC(GPP_L16, NONE), /* GPIO */
297  PAD_NC(GPP_L17, NONE), /* GPIO */
298  PAD_NC(GPP_L18, NONE), /* GPIO */
299  PAD_NC(GPP_L19, NONE), /* GPIO */
300 };
301 
302 /* Early pad configuration in bootblock */
303 static const struct pad_config early_gpio_table[] = {
304  /* ------- GPIO Community 0 ------- */
305  /* ------- GPIO Group GPP_A ------- */
306  PAD_CFG_NF(GPP_A0, NONE, RSMRST, NF3), /* ESPI_ALERT1# */
307  PAD_CFG_NF(GPP_A1, NONE, RSMRST, NF1), /* LAD0 */
308  PAD_CFG_NF(GPP_A2, NONE, RSMRST, NF1), /* LAD1 */
309  PAD_CFG_NF(GPP_A3, NONE, RSMRST, NF1), /* LAD2 */
310  PAD_CFG_NF(GPP_A4, NONE, RSMRST, NF1), /* LAD3 */
311  PAD_CFG_NF(GPP_A5, NONE, RSMRST, NF1), /* LFRAME# */
312  PAD_CFG_NF(GPP_A6, NONE, RSMRST, NF1), /* SERIRQ */
313  PAD_CFG_NF(GPP_A8, NONE, RSMRST, NF1), /* CLKRUN# */
314  PAD_CFG_NF(GPP_A9, NONE, RSMRST, NF1), /* CLKOUT_LPC0 */
315  PAD_NC(GPP_A10, NONE), /* GPIO */
316  PAD_CFG_NF(GPP_A13, NONE, RSMRST, NF1), /* SUSWARN#/SUSPWRDNACK */
317  PAD_NC(GPP_A14, NONE), /* GPIO */
318  PAD_CFG_NF(GPP_A15, NONE, RSMRST, NF1), /* SUS_ACK# */
319 };
320 
321 #endif /* CFG_GPIO_H */
#define GPD11
#define GPP_A4
#define GPP_H22
#define GPP_C15
#define GPD3
#define GPP_H20
#define GPP_B6
Definition: gpio_soc_defs.h:59
#define GPP_H19
#define GPP_D1
#define GPD9
#define GPP_C2
#define GPP_D10
#define GPP_D8
#define GPP_D17
#define GPP_E3
#define GPP_A18
#define GPP_F21
#define GPP_C12
#define GPP_F12
#define GPP_F16
#define GPP_H15
#define GPP_E0
#define GPP_F6
#define GPP_H18
#define GPP_D14
#define GPP_B1
Definition: gpio_soc_defs.h:54
#define GPP_F20
#define GPP_F23
#define GPP_C5
#define GPP_A14
#define GPP_B12
Definition: gpio_soc_defs.h:65
#define GPP_D12
#define GPP_B16
Definition: gpio_soc_defs.h:69
#define GPP_A5
#define GPP_B2
Definition: gpio_soc_defs.h:55
#define GPP_D7
#define GPP_B13
Definition: gpio_soc_defs.h:66
#define GPP_E6
#define GPP_F0
#define GPP_D6
#define GPP_D2
#define GPP_H12
#define GPP_H6
#define GPP_C9
#define GPP_H2
#define GPP_C22
#define GPP_H9
#define GPP_D9
#define GPP_F5
#define GPP_B15
Definition: gpio_soc_defs.h:68
#define GPP_A2
#define GPP_H21
#define GPP_C23
#define GPP_C8
#define GPP_D11
#define GPP_H7
#define GPP_A6
#define GPP_H1
#define GPP_C11
#define GPP_D5
#define GPP_B22
Definition: gpio_soc_defs.h:75
#define GPP_A23
#define GPP_C18
#define GPP_F9
#define GPP_C13
#define GPP_E9
#define GPP_C17
#define GPP_E8
#define GPP_A7
#define GPP_E5
#define GPP_A0
#define GPD7
#define GPP_B8
Definition: gpio_soc_defs.h:61
#define GPP_B20
Definition: gpio_soc_defs.h:73
#define GPP_A20
#define GPP_A16
#define GPP_F1
#define GPP_F17
#define GPP_A12
#define GPP_F15
#define GPP_D4
#define GPP_C10
#define GPD2
#define GPP_F10
#define GPP_A3
#define GPP_E7
#define GPP_C16
#define GPP_F7
#define GPD1
#define GPP_F13
#define GPP_D18
#define GPP_B19
Definition: gpio_soc_defs.h:72
#define GPP_E2
#define GPP_H0
#define GPP_H5
#define GPP_C21
#define GPP_B9
Definition: gpio_soc_defs.h:62
#define GPD10
#define GPP_F14
#define GPP_H3
#define GPP_F4
#define GPP_A10
#define GPP_A8
#define GPP_D0
#define GPP_A1
#define GPP_B14
Definition: gpio_soc_defs.h:67
#define GPP_D13
#define GPP_B18
Definition: gpio_soc_defs.h:71
#define GPP_B5
Definition: gpio_soc_defs.h:58
#define GPP_B0
Definition: gpio_soc_defs.h:53
#define GPP_A11
#define GPP_C14
#define GPP_A15
#define GPP_A9
#define GPP_E10
#define GPP_F8
#define GPP_C19
#define GPD8
#define GPP_A13
#define GPP_A21
#define GPP_B23
Definition: gpio_soc_defs.h:76
#define GPP_B10
Definition: gpio_soc_defs.h:63
#define GPP_D19
#define GPP_F2
#define GPP_E11
#define GPD6
#define GPP_F18
#define GPP_B3
Definition: gpio_soc_defs.h:56
#define GPP_A22
#define GPP_F22
#define GPP_D15
#define GPP_F11
#define GPP_B21
Definition: gpio_soc_defs.h:74
#define GPD4
#define GPP_B4
Definition: gpio_soc_defs.h:57
#define GPP_D16
#define GPP_F3
#define GPP_E12
#define GPP_A17
#define GPP_B17
Definition: gpio_soc_defs.h:70
#define GPP_E4
#define GPD5
#define GPP_E1
#define GPP_H8
#define GPP_F19
#define GPP_H4
#define GPP_H23
#define GPP_B7
Definition: gpio_soc_defs.h:60
#define GPP_D3
#define GPP_D23
#define GPP_G1
Definition: gpio_soc_defs.h:89
#define GPP_G7
Definition: gpio_soc_defs.h:95
#define GPP_D22
#define GPP_G4
Definition: gpio_soc_defs.h:92
#define GPP_G2
Definition: gpio_soc_defs.h:90
#define GPP_D21
#define GPP_G6
Definition: gpio_soc_defs.h:94
#define GPP_G0
Definition: gpio_soc_defs.h:88
#define GPP_D20
#define GPP_G3
Definition: gpio_soc_defs.h:91
#define GPP_G5
Definition: gpio_soc_defs.h:93
static const struct pad_config gpio_table[]
Definition: cpxsp_dl_gpio.h:9
static const struct pad_config early_gpio_table[]
#define GPP_G21
#define GPP_G16
Definition: gpio_soc_defs.h:98
#define GPP_G8
Definition: gpio_soc_defs.h:90
#define GPP_G12
Definition: gpio_soc_defs.h:94
#define GPP_G15
Definition: gpio_soc_defs.h:97
#define GPP_G17
Definition: gpio_soc_defs.h:99
#define GPP_G11
Definition: gpio_soc_defs.h:93
#define GPP_G23
#define GPP_G18
#define GPP_G19
#define GPP_G13
Definition: gpio_soc_defs.h:95
#define GPP_G14
Definition: gpio_soc_defs.h:96
#define GPP_G10
Definition: gpio_soc_defs.h:92
#define GPP_G22
#define GPP_G9
Definition: gpio_soc_defs.h:91
#define GPP_K4
#define GPP_I5
#define GPP_J7
#define GPP_J4
#define GPP_K2
#define GPP_K9
#define GPP_J5
#define GPP_I10
#define GPP_J8
#define GPP_J0
#define GPP_J2
#define GPP_J9
#define GPP_I8
#define GPP_J1
#define GPP_J6
#define GPP_I7
#define GPP_I3
#define GPP_I6
#define GPP_J10
#define GPP_K7
#define GPP_I9
#define GPP_K1
#define GPP_I2
#define GPP_J11
#define GPP_J3
#define GPP_I0
#define GPP_K10
#define GPP_K5
#define GPP_K6
#define GPP_K0
#define GPP_I4
#define GPP_K3
#define GPP_I1
#define GPP_K8
#define GPP_L2
#define GPP_L3
#define GPP_J18
#define GPP_J17
#define GPP_J14
#define GPP_J19
#define GPP_L6
#define GPP_L19
#define GPP_L17
#define GPP_J22
#define GPP_L18
#define GPP_L14
#define GPP_J23
#define GPP_L13
#define GPP_L9
#define GPP_L4
#define GPP_L7
#define GPP_J15
#define GPP_L5
#define GPP_J16
#define GPP_L8
#define GPP_L1
#define GPP_J20
#define GPP_L10
#define GPP_J13
#define GPP_L11
#define GPP_L16
#define GPP_L15
#define GPP_L12
#define GPP_J12
#define GPP_J21
#define PAD_NC(pin)
Definition: gpio_defs.h:263
#define PAD_CFG_GPI_SMI(pad, pull, rst, trig, inv)
Definition: gpio_defs.h:412
#define PAD_CFG_GPI_TRIG_OWN(pad, pull, rst, trig, own)
Definition: gpio_defs.h:311
#define PAD_CFG_NF(pad, pull, rst, func)
Definition: gpio_defs.h:197
#define PAD_CFG_GPI_NMI(pad, pull, rst, trig, inv)
Definition: gpio_defs.h:477
#define PAD_CFG_GPO(pad, val, rst)
Definition: gpio_defs.h:247
#define PAD_CFG_GPI_SCI(pad, pull, rst, trig, inv)
Definition: gpio_defs.h:432