pmc.h File Reference

#include <device/device.h>
#include <stdint.h>

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Data Structures
struct	pmc_resource_config

Functions
void	pmc_soc_init (struct device *dev)
int	pmc_soc_get_resources (struct pmc_resource_config *cfg)

Function Documentation

pmc_soc_get_resources()

int pmc_soc_get_resources

(

struct pmc_resource_config *

cfg

)

Definition at line 15 of file pmc.c.

References ABASE, pmc_resource_config::abase_addr, pmc_resource_config::abase_offset, pmc_resource_config::abase_size, ACPI_BASE_ADDRESS, ACPI_BASE_SIZE, DEFAULT_PMBASE, DEFAULT_PMBASE_SIZE, DEFAULT_PWRM_BASE, DEFAULT_PWRM_SIZE, PCH_PWRM_BASE_ADDRESS, PCH_PWRM_BASE_SIZE, PCI_BASE_ADDRESS_0, PCI_BASE_ADDRESS_4, PMC_ACPI_BASE, PMC_BAR0_SIZE, PMC_PWRM_BASE, PWRMBASE, pmc_resource_config::pwrmbase_addr, pmc_resource_config::pwrmbase_offset, and pmc_resource_config::pwrmbase_size.

Referenced by pch_pmc_read_resources().

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pmc_soc_init()

void pmc_soc_init

(

struct device *

dev

)

Definition at line 80 of file pmc.c.

References ACPI_BASE_ADDRESS, ACPI_TIM_DIS, BIOS_DEBUG, config, CONFIG, config_deep_s3(), config_deep_s5(), config_deep_sx(), config_of(), reg_script::dev, DIS_SLP_X_STRCH_SUS_UP, GBLRST_CAUSE0, GBLRST_CAUSE1, GEN_PMCON_B, inl(), MASK_PMC_PWRM_BASE, NULL, outl(), pch_log_state(), pch_pmc_misc_init_script, pch_power_options(), PCH_PWRM_ACPI_TMR_CTL, pch_set_acpi_mode(), PCI_COMMAND, PCI_COMMAND_IO, PCI_COMMAND_MASTER, PCI_COMMAND_MEMORY, pci_or_config32(), pci_read_config32(), pci_update_config32(), pci_write_config16(), PM1_CNT, pmc_clear_prsts(), pmc_gpe_init(), pmc_mmio_regs(), PMC_PWRM_BASE, pmc_set_acpi_mode(), pmc_set_power_failure_state(), pmc_write1_to_clear_script, printk, reg_script_run_on_dev(), rtc_init(), S4MAW_4S, S4MAW_MASK, SCI_EN, set_slp_s3_assertion_width(), setbits32, setbits8, soc_intel_apollolake_config::slp_s3_assertion_width_usecs, SLP_S3_MIN_ASST_WDTH_50MS, SLP_S3_MIN_ASST_WDTH_MASK, and SLP_TYP.

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