coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
spi.c File Reference
#include <device/mmio.h>
#include <device/pci_ops.h>
#include <bootstate.h>
#include <console/console.h>
#include <device/pci_ids.h>
#include <device/pci_def.h>
#include <delay.h>
#include <soc/pci_devs.h>
#include <soc/QuarkNcSocId.h>
#include <soc/spi.h>
#include <string.h>
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Functions

void spi_bios_base (uint32_t bios_base_address)
 
void spi_controller_lock (void)
 
int spi_protection (uint32_t address, uint32_t length)
 
static int xfer (const struct spi_slave *slave, const void *dout, size_t bytesout, void *din, size_t bytesin)
 
void spi_init (void)
 Init all SPI controllers with default values and enable all SPI controller. More...
 
static void spi_init_cb (void *unused)
 
 BOOT_STATE_INIT_ENTRY (BS_DEV_INIT, BS_ON_ENTRY, spi_init_cb, NULL)
 

Variables

struct spi_context spi_driver_context
 
const struct spi_ctrlr spi_driver
 
const struct spi_ctrlr_buses spi_ctrlr_bus_map []
 
const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map)
 

Function Documentation

◆ BOOT_STATE_INIT_ENTRY()

BOOT_STATE_INIT_ENTRY ( BS_DEV_INIT  ,
BS_ON_ENTRY  ,
spi_init_cb  ,
NULL   
)

◆ spi_bios_base()

void spi_bios_base ( uint32_t  bios_base_address)

Definition at line 21 of file spi.c.

References address, flash_ctrlr::bbar, spi_context::ctrlr, and spi_driver_context.

◆ spi_controller_lock()

void spi_controller_lock ( void  )

Definition at line 31 of file spi.c.

References spi_context::ctrlr, spi_driver_context, SPISTS_CLD, and flash_ctrlr::status.

◆ spi_init()

void spi_init ( void  )

◆ spi_init_cb()

static void spi_init_cb ( void unused)
static

Definition at line 263 of file spi.c.

References BIOS_DEBUG, printk, spi_flash_probe(), and spi_init().

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◆ spi_protection()

int spi_protection ( uint32_t  address,
uint32_t  length 
)

Definition at line 39 of file spi.c.

References address, ARRAY_SIZE, base, BIOS_ERR, spi_context::ctrlr, length, flash_ctrlr::pbr, printk, read32(), spi_driver_context, SPIPBR_PRB, SPIPBR_PRB_SHIFT, SPIPBR_PRL, SPIPBR_WPE, value, and write32().

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◆ xfer()

Variable Documentation

◆ spi_ctrlr_bus_map

const struct spi_ctrlr_buses spi_ctrlr_bus_map[]
Initial value:
= {
{
.ctrlr = &spi_driver,
.bus_start = 0,
.bus_end = 0,
},
}
const struct spi_ctrlr spi_driver
Definition: spi.c:277

Definition at line 275 of file spi.c.

◆ spi_ctrlr_bus_map_count

const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map)

Definition at line 290 of file spi.c.

◆ spi_driver

const struct spi_ctrlr spi_driver
Initial value:
= {
.xfer = xfer,
.max_xfer_size = 64,
}
static int xfer(const struct spi_slave *slave, const void *dout, size_t bytesout, void *din, size_t bytesin)
Definition: spi.c:76

Definition at line 275 of file spi.c.

◆ spi_driver_context

struct spi_context spi_driver_context
Initial value:
= {
0,
0
}
#define NULL
Definition: stddef.h:19

Definition at line 1 of file spi.c.

Referenced by spi_bios_base(), spi_controller_lock(), spi_init(), spi_protection(), and xfer().