coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
atl1e.c
Go to the documentation of this file.
1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 /*
4  * This driver sets the macaddress of a Atheros AR8121/AR8113/AR8114
5  */
6 
7 #include <device/mmio.h>
8 #include <device/device.h>
9 #include <cbfs.h>
10 #include <console/console.h>
11 #include <device/pci.h>
12 #include <device/pci_ops.h>
13 #include <types.h>
14 
15 #define REG_SPI_FLASH_CTRL 0x200
16 #define SPI_FLASH_CTRL_EN_VPD 0x2000
17 
18 #define REG_PCIE_CAP_LIST 0x58
19 
20 #define REG_MAC_STA_ADDR 0x1488
21 
22 static u8 get_hex_digit(const u8 c)
23 {
24  u8 ret = 0;
25 
26  ret = c - '0';
27  if (ret > 0x09) {
28  ret = c - 'A' + 0x0a;
29  if (ret > 0x0f)
30  ret = c - 'a' + 0x0a;
31  }
32  if (ret > 0x0f) {
33  printk(BIOS_ERR, "Invalid hex digit found: "
34  "%c - 0x%02x\n", (char)c, c);
35  ret = 0;
36  }
37  return ret;
38 }
39 
40 #define MACLEN 17
41 
42 static enum cb_err fetch_mac_string_cbfs(u8 *macstrbuf)
43 {
44  if (!cbfs_load("atl1e-macaddress", macstrbuf, MACLEN)) {
45  printk(BIOS_ERR, "atl1e: Error reading MAC from CBFS\n");
46  return CB_ERR;
47  }
48  return CB_SUCCESS;
49 }
50 
51 static void get_mac_address(u8 *macaddr, const u8 *strbuf)
52 {
53  size_t offset = 0;
54  int i;
55 
56  if ((strbuf[2] != ':') || (strbuf[5] != ':') ||
57  (strbuf[8] != ':') || (strbuf[11] != ':') ||
58  (strbuf[14] != ':')) {
59  printk(BIOS_ERR, "atl1e: ignore invalid MAC address in cbfs\n");
60  return;
61  }
62 
63  for (i = 0; i < 6; i++) {
64  macaddr[i] = 0;
65  macaddr[i] |= get_hex_digit(strbuf[offset]) << 4;
66  macaddr[i] |= get_hex_digit(strbuf[offset + 1]);
67  offset += 3;
68  }
69 }
70 
71 static void program_mac_address(u32 mem_base)
72 {
73  u8 macstrbuf[MACLEN] = { 0 };
74  /* Default MAC Address of 90:e6:ba:24:f9:d2 */
75  u8 mac[6] = { 0x90, 0xe6, 0xba, 0x24, 0xf9, 0xd2 };
76  u32 value;
77 
78  if (fetch_mac_string_cbfs(macstrbuf) != CB_SUCCESS) {
79  printk(BIOS_ERR, "atl1e: Error reading MAC from CBFS,"
80  " using default 90:e6:ba:24:f9:d2\n");
81  } else {
82  get_mac_address(mac, macstrbuf);
83  }
84 
85  printk(BIOS_DEBUG, "atl1e: Programming MAC Address...");
86 
87  value = (mac[2] << 24) | (mac[3] << 16) | (mac[4] << 8) | (mac[5] << 0);
88  write32((void *)mem_base + REG_MAC_STA_ADDR, value);
89  value = (mac[0] << 8) | (mac[1] << 0);
90  write32((void *)mem_base + REG_MAC_STA_ADDR + 4, value);
91 
92  printk(BIOS_DEBUG, "done\n");
93 }
94 
95 static int atl1e_eeprom_exist(u32 mem_base)
96 {
97  u32 value = read32((void *)mem_base + REG_SPI_FLASH_CTRL);
100  write32((void *)mem_base + REG_SPI_FLASH_CTRL, value);
101  }
102  value = read32((void *)mem_base + REG_PCIE_CAP_LIST);
103  return ((value & 0xff00) == 0x6c00) ? 1 : 0;
104 }
105 
106 static void atl1e_init(struct device *dev)
107 {
108  /* Get the resource of the NIC mmio */
109  struct resource *nic_res = probe_resource(dev, PCI_BASE_ADDRESS_0);
110 
111  if (nic_res == NULL) {
112  printk(BIOS_ERR, "atl1e: resource not found\n");
113  return;
114  }
115 
116  u32 mem_base = nic_res->base;
117 
118  if (!mem_base) {
119  printk(BIOS_ERR, "atl1e: resource not assigned\n");
120  return;
121  }
122 
123  if (atl1e_eeprom_exist(mem_base)) {
124  printk(BIOS_INFO, "atl1e NIC has SPI eeprom, not setting MAC\n");
125  return;
126  }
127 
128  /* Check if the base is invalid */
129  if (!mem_base) {
130  printk(BIOS_ERR, "atl1e: Error can't find MEM resource\n");
131  return;
132  }
133  /* Enable but do not set bus master */
136 
137  /* Program MAC address based on CBFS "macaddress" containing
138  * a string AA:BB:CC:DD:EE:FF */
139  program_mac_address(mem_base);
140 }
141 
142 static struct device_operations atl1e_ops = {
144  .set_resources = pci_dev_set_resources,
145  .enable_resources = pci_dev_enable_resources,
146  .init = atl1e_init,
147 };
148 
149 static const struct pci_driver atl1e_driver __pci_driver = {
150  .ops = &atl1e_ops,
151  .vendor = 0x1969,
152  .device = 0x1026,
153 };
154 
156  CHIP_NAME("Atheros AR8121/AR8113/AR8114")
157 };
pte_t value
Definition: mmu.c:91
static void write32(void *addr, uint32_t val)
Definition: mmio.h:40
static uint32_t read32(const void *addr)
Definition: mmio.h:22
static int atl1e_eeprom_exist(u32 mem_base)
Definition: atl1e.c:95
struct chip_operations drivers_net_ops
Definition: atl1e.c:155
#define SPI_FLASH_CTRL_EN_VPD
Definition: atl1e.c:16
#define REG_SPI_FLASH_CTRL
Definition: atl1e.c:15
#define MACLEN
Definition: atl1e.c:40
#define REG_PCIE_CAP_LIST
Definition: atl1e.c:18
static u8 get_hex_digit(const u8 c)
Definition: atl1e.c:22
#define REG_MAC_STA_ADDR
Definition: atl1e.c:20
static enum cb_err fetch_mac_string_cbfs(u8 *macstrbuf)
Definition: atl1e.c:42
static void atl1e_init(struct device *dev)
Definition: atl1e.c:106
static struct device_operations atl1e_ops
Definition: atl1e.c:142
static void program_mac_address(u32 mem_base)
Definition: atl1e.c:71
static const struct pci_driver atl1e_driver __pci_driver
Definition: atl1e.c:149
static void get_mac_address(u8 *macaddr, const u8 *strbuf)
Definition: atl1e.c:51
cb_err
coreboot error codes
Definition: cb_err.h:15
@ CB_ERR
Generic error code.
Definition: cb_err.h:17
@ CB_SUCCESS
Call completed successfully.
Definition: cb_err.h:16
static size_t cbfs_load(const char *name, void *buf, size_t size)
Definition: cbfs.h:282
#define printk(level,...)
Definition: stdlib.h:16
struct resource * probe_resource(const struct device *dev, unsigned int index)
See if a resource structure already exists for a given index.
Definition: device_util.c:323
static size_t offset
Definition: flashconsole.c:16
#define CHIP_NAME(X)
Definition: device.h:32
static __always_inline void pci_write_config16(const struct device *dev, u16 reg, u16 val)
Definition: pci_ops.h:70
#define BIOS_INFO
BIOS_INFO - Expected events.
Definition: loglevel.h:113
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
Definition: loglevel.h:128
#define BIOS_ERR
BIOS_ERR - System in incomplete state.
Definition: loglevel.h:72
#define PCI_COMMAND_IO
Definition: pci_def.h:11
#define PCI_COMMAND_MEMORY
Definition: pci_def.h:12
#define PCI_BASE_ADDRESS_0
Definition: pci_def.h:63
#define PCI_COMMAND
Definition: pci_def.h:10
void pci_dev_enable_resources(struct device *dev)
Definition: pci_device.c:721
void pci_dev_read_resources(struct device *dev)
Definition: pci_device.c:534
void pci_dev_set_resources(struct device *dev)
Definition: pci_device.c:691
#define NULL
Definition: stddef.h:19
uint32_t u32
Definition: stdint.h:51
uint8_t u8
Definition: stdint.h:45
void(* read_resources)(struct device *dev)
Definition: device.h:39
Definition: device.h:107
resource_t base
Definition: resource.h:45
#define c(value, pmcreg, dst_bits)