coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
rtc.h File Reference
#include <soc/pmif.h>
#include <stdbool.h>
Include dependency graph for rtc.h:

Go to the source code of this file.

Enumerations

enum  { RTC_BBPU = 0x0588 , RTC_IRQ_STA = 0x058A , RTC_IRQ_EN = 0x058C , RTC_CII_EN = 0x058E }
 
enum  {
  RTC_TC_SEC = 0x0592 , RTC_TC_MIN = 0x0594 , RTC_TC_HOU = 0x0596 , RTC_TC_DOM = 0x0598 ,
  RTC_TC_DOW = 0x059A , RTC_TC_MTH = 0x059C , RTC_TC_YEA = 0x059E
}
 
enum  {
  RTC_AL_SEC = 0x05A0 , RTC_AL_MIN = 0x05A2 , RTC_AL_HOU = 0x05A4 , RTC_AL_DOM = 0x05A6 ,
  RTC_AL_DOW = 0x05A8 , RTC_AL_MTH = 0x05AA , RTC_AL_YEA = 0x05AC , RTC_AL_MASK = 0x0590
}
 
enum  { RTC_OSC32CON = 0x05AE , RTC_CON = 0x05C4 , RTC_WRTGR = 0x05C2 }
 
enum  { RTC_POWERKEY1 = 0x05B0 , RTC_POWERKEY2 = 0x05B2 }
 
enum  {
  RTC_PDN1 = 0x05B4 , RTC_PDN2 = 0x05B6 , RTC_SPAR0 = 0x05B8 , RTC_SPAR1 = 0x05BA ,
  RTC_PROT = 0x05BC , RTC_DIFF = 0x05BE , RTC_CALI = 0x05C0
}
 
enum  {
  RTC_BBPU_ENABLE_ALARM = 1U << 0 , RTC_BBPU_SPAR_SW = 1U << 1 , RTC_BBPU_RESET_SPAR = 1U << 2 , RTC_BBPU_RESET_ALARM = 1U << 3 ,
  RTC_BBPU_CLRPKY = 1U << 4 , RTC_BBPU_RELOAD = 1U << 5 , RTC_BBPU_CBUSY = 1U << 6 , RTC_CBUSY_TIMEOUT_US = 1000000
}
 
enum  {
  RTC_CON_VBAT_LPSTA_RAW = 1U << 0 , RTC_CON_EOSC32_LPEN = 1U << 1 , RTC_CON_XOSC32_LPEN = 1U << 2 , RTC_CON_LPRST = 1U << 3 ,
  RTC_CON_CDBO = 1U << 4 , RTC_CON_F32KOB = 1U << 5 , RTC_CON_GPO = 1U << 6 , RTC_CON_GOE = 1U << 7 ,
  RTC_CON_GSR = 1U << 8 , RTC_CON_GSMT = 1U << 9 , RTC_CON_GPEN = 1U << 10 , RTC_CON_GPU = 1U << 11 ,
  RTC_CON_GE4 = 1U << 12 , RTC_CON_GE8 = 1U << 13 , RTC_CON_GPI = 1U << 14 , RTC_CON_LPSTA_RAW = 1U << 15
}
 
enum  {
  RTC_XOSCCALI_MASK = 0x1F << 0 , RTC_XOSC32_ENB = 1U << 5 , RTC_EMB_HW_MODE = 0U << 6 , RTC_EMB_K_EOSC32_MODE = 1U << 6 ,
  RTC_EMB_SW_DCXO_MODE = 2U << 6 , RTC_EMB_SW_EOSC32_MODE = 3U << 6 , RTC_EMBCK_SEL_MODE_MASK = 3U << 6 , RTC_EMBCK_SRC_SEL = 1U << 8 ,
  RTC_EMBCK_SEL_OPTION = 1U << 9 , RTC_GPS_CKOUT_EN = 1U << 10 , RTC_EOSC32_VCT_EN = 1U << 11 , RTC_EOSC32_CHOP_EN = 1U << 12 ,
  RTC_GP_OSC32_CON = 2U << 13 , RTC_REG_XOSC32_ENB = 1U << 15
}
 
enum  { OSC32CON_ANALOG_SETTING }
 
enum  {
  RTC_LPD_OPT_XOSC_AND_EOSC_LPD = 0U << 13 , RTC_LPD_OPT_EOSC_LPD = 1U << 13 , RTC_LPD_OPT_XOSC_LPD = 2U << 13 , RTC_LPD_OPT_F32K_CK_ALIVE = 3U << 13 ,
  RTC_LPD_OPT_MASK = 3U << 13
}
 
enum  { PMIC_RG_SCK_TOP_CON0 = 0x050C }
 
enum  {
  PMIC_RG_TOP_CKPDN_CON0 = 0x010C , PMIC_RG_TOP_CKPDN_CON0_SET = 0x010E , PMIC_RG_TOP_CKPDN_CON0_CLR = 0x0110 , PMIC_RG_TOP_CKPDN_CON1 = 0x0112 ,
  PMIC_RG_TOP_CKPDN_CON1_SET = 0x0114 , PMIC_RG_TOP_CKPDN_CON1_CLR = 0x0116 , PMIC_RG_TOP_CKSEL_CON0 = 0x0118 , PMIC_RG_TOP_CKSEL_CON0_SET = 0x011A ,
  PMIC_RG_TOP_CKSEL_CON0_CLR = 0x011C
}
 
enum  { PMIC_RG_FQMTR_32K_CK_PDN_SHIFT = 10 , PMIC_RG_FQMTR_CK_PDN_SHIFT = 11 }
 
enum  { PMIC_RG_BANK_FQMTR_RST = 0x522 }
 
enum  { PMIC_RG_FQMTR_DCXO26M_EN_SHIFT = 4 , PMIC_RG_BANK_FQMTR_RST_SHIFT = 6 }
 
enum  {
  PMIC_RG_FQMTR_CKSEL = 0x0118 , PMIC_RG_FQMTR_RST = 0x013A , PMIC_RG_FQMTR_CON0 = 0x0546 , PMIC_RG_FQMTR_WINSET = 0x0548 ,
  PMIC_RG_FQMTR_DATA = 0x054A , FQMTR_TIMEOUT_US = 8000
}
 
enum  {
  PMIC_FQMTR_FIX_CLK_26M = 0U << 0 , PMIC_FQMTR_FIX_CLK_XOSC_32K_DET = 1U << 0 , PMIC_FQMTR_FIX_CLK_EOSC_32K = 2U << 0 , PMIC_FQMTR_FIX_CLK_RTC_32K = 3U << 0 ,
  PMIC_FQMTR_FIX_CLK_DCXO1M_CK = 4U << 0 , PMIC_FQMTR_FIX_CLK_TCK_SEC = 5U << 0 , PMIC_FQMTR_FIX_CLK_PMU_32K = 6U << 0 , PMIC_FQMTR_CKSEL_MASK = 7U << 0
}
 
enum  { PMIC_FQMTR_RST_SHIFT = 8 }
 
enum  {
  PMIC_FQMTR_CON0_XOSC32_CK = 0U << 0 , PMIC_FQMTR_CON0_DCXO_F32K_CK = 1U << 0 , PMIC_FQMTR_CON0_EOSC32_CK = 2U << 0 , PMIC_FQMTR_CON0_XOSC32_CK_DETECTON = 3U << 0 ,
  PMIC_FQMTR_CON0_FQM26M_CK = 4U << 0 , PMIC_FQMTR_CON0_FQM32k_CK = 5U << 0 , PMIC_FQMTR_CON0_TEST_CK = 6U << 0 , PMIC_FQMTR_CON0_TCKSEL_MASK = 7U << 0 ,
  PMIC_FQMTR_CON0_BUSY = 1U << 3 , PMIC_FQMTR_CON0_DCXO26M_EN = 1U << 4 , PMIC_FQMTR_CON0_FQMTR_EN = 1U << 15
}
 
enum  { RTC_FQMTR_LOW_BASE = 794 - 2 , RTC_FQMTR_HIGH_BASE = 794 + 2 }
 
enum  { RTC_XOSCCALI_START = 0x00 , RTC_XOSCCALI_END = 0x1f }
 
enum  { RTC_TC_MTH_MASK = 0xf }
 
enum  { RTC_K_EOSC_RSV_0 = 1 << 8 , RTC_K_EOSC_RSV_1 = 1 << 9 , RTC_K_EOSC_RSV_2 = 1 << 10 }
 

Functions

void rtc_read (u16 addr, u16 *rdata)
 
void rtc_write (u16 addr, u16 wdata)
 
void rtc_bbpu_power_on (void)
 
int rtc_init (int recover)
 
bool rtc_gpio_init (void)
 
void rtc_boot (void)
 
u16 rtc_get_frequency_meter (u16 val, u16 measure_src, u16 window_size)
 

Enumeration Type Documentation

◆ anonymous enum

anonymous enum
Enumerator
RTC_BBPU 
RTC_IRQ_STA 
RTC_IRQ_EN 
RTC_CII_EN 

Definition at line 10 of file rtc.h.

◆ anonymous enum

anonymous enum
Enumerator
RTC_TC_SEC 
RTC_TC_MIN 
RTC_TC_HOU 
RTC_TC_DOM 
RTC_TC_DOW 
RTC_TC_MTH 
RTC_TC_YEA 

Definition at line 17 of file rtc.h.

◆ anonymous enum

anonymous enum
Enumerator
RTC_AL_SEC 
RTC_AL_MIN 
RTC_AL_HOU 
RTC_AL_DOM 
RTC_AL_DOW 
RTC_AL_MTH 
RTC_AL_YEA 
RTC_AL_MASK 

Definition at line 27 of file rtc.h.

◆ anonymous enum

anonymous enum
Enumerator
RTC_OSC32CON 
RTC_CON 
RTC_WRTGR 

Definition at line 38 of file rtc.h.

◆ anonymous enum

anonymous enum
Enumerator
RTC_POWERKEY1 
RTC_POWERKEY2 

Definition at line 44 of file rtc.h.

◆ anonymous enum

anonymous enum
Enumerator
RTC_PDN1 
RTC_PDN2 
RTC_SPAR0 
RTC_SPAR1 
RTC_PROT 
RTC_DIFF 
RTC_CALI 

Definition at line 49 of file rtc.h.

◆ anonymous enum

anonymous enum
Enumerator
RTC_BBPU_ENABLE_ALARM 
RTC_BBPU_SPAR_SW 
RTC_BBPU_RESET_SPAR 
RTC_BBPU_RESET_ALARM 
RTC_BBPU_CLRPKY 
RTC_BBPU_RELOAD 
RTC_BBPU_CBUSY 
RTC_CBUSY_TIMEOUT_US 

Definition at line 59 of file rtc.h.

◆ anonymous enum

anonymous enum
Enumerator
RTC_CON_VBAT_LPSTA_RAW 
RTC_CON_EOSC32_LPEN 
RTC_CON_XOSC32_LPEN 
RTC_CON_LPRST 
RTC_CON_CDBO 
RTC_CON_F32KOB 
RTC_CON_GPO 
RTC_CON_GOE 
RTC_CON_GSR 
RTC_CON_GSMT 
RTC_CON_GPEN 
RTC_CON_GPU 
RTC_CON_GE4 
RTC_CON_GE8 
RTC_CON_GPI 
RTC_CON_LPSTA_RAW 

Definition at line 70 of file rtc.h.

◆ anonymous enum

anonymous enum
Enumerator
RTC_XOSCCALI_MASK 
RTC_XOSC32_ENB 
RTC_EMB_HW_MODE 
RTC_EMB_K_EOSC32_MODE 
RTC_EMB_SW_DCXO_MODE 
RTC_EMB_SW_EOSC32_MODE 
RTC_EMBCK_SEL_MODE_MASK 
RTC_EMBCK_SRC_SEL 
RTC_EMBCK_SEL_OPTION 
RTC_GPS_CKOUT_EN 
RTC_EOSC32_VCT_EN 
RTC_EOSC32_CHOP_EN 
RTC_GP_OSC32_CON 
RTC_REG_XOSC32_ENB 

Definition at line 89 of file rtc.h.

◆ anonymous enum

anonymous enum
Enumerator
OSC32CON_ANALOG_SETTING 

Definition at line 106 of file rtc.h.

◆ anonymous enum

anonymous enum
Enumerator
RTC_LPD_OPT_XOSC_AND_EOSC_LPD 
RTC_LPD_OPT_EOSC_LPD 
RTC_LPD_OPT_XOSC_LPD 
RTC_LPD_OPT_F32K_CK_ALIVE 
RTC_LPD_OPT_MASK 

Definition at line 112 of file rtc.h.

◆ anonymous enum

anonymous enum
Enumerator
PMIC_RG_SCK_TOP_CON0 

Definition at line 121 of file rtc.h.

◆ anonymous enum

anonymous enum
Enumerator
PMIC_RG_TOP_CKPDN_CON0 
PMIC_RG_TOP_CKPDN_CON0_SET 
PMIC_RG_TOP_CKPDN_CON0_CLR 
PMIC_RG_TOP_CKPDN_CON1 
PMIC_RG_TOP_CKPDN_CON1_SET 
PMIC_RG_TOP_CKPDN_CON1_CLR 
PMIC_RG_TOP_CKSEL_CON0 
PMIC_RG_TOP_CKSEL_CON0_SET 
PMIC_RG_TOP_CKSEL_CON0_CLR 

Definition at line 126 of file rtc.h.

◆ anonymous enum

anonymous enum
Enumerator
PMIC_RG_FQMTR_32K_CK_PDN_SHIFT 
PMIC_RG_FQMTR_CK_PDN_SHIFT 

Definition at line 138 of file rtc.h.

◆ anonymous enum

anonymous enum
Enumerator
PMIC_RG_BANK_FQMTR_RST 

Definition at line 143 of file rtc.h.

◆ anonymous enum

anonymous enum
Enumerator
PMIC_RG_FQMTR_DCXO26M_EN_SHIFT 
PMIC_RG_BANK_FQMTR_RST_SHIFT 

Definition at line 147 of file rtc.h.

◆ anonymous enum

anonymous enum
Enumerator
PMIC_RG_FQMTR_CKSEL 
PMIC_RG_FQMTR_RST 
PMIC_RG_FQMTR_CON0 
PMIC_RG_FQMTR_WINSET 
PMIC_RG_FQMTR_DATA 
FQMTR_TIMEOUT_US 

Definition at line 153 of file rtc.h.

◆ anonymous enum

anonymous enum
Enumerator
PMIC_FQMTR_FIX_CLK_26M 
PMIC_FQMTR_FIX_CLK_XOSC_32K_DET 
PMIC_FQMTR_FIX_CLK_EOSC_32K 
PMIC_FQMTR_FIX_CLK_RTC_32K 
PMIC_FQMTR_FIX_CLK_DCXO1M_CK 
PMIC_FQMTR_FIX_CLK_TCK_SEC 
PMIC_FQMTR_FIX_CLK_PMU_32K 
PMIC_FQMTR_CKSEL_MASK 

Definition at line 162 of file rtc.h.

◆ anonymous enum

anonymous enum
Enumerator
PMIC_FQMTR_RST_SHIFT 

Definition at line 173 of file rtc.h.

◆ anonymous enum

anonymous enum
Enumerator
PMIC_FQMTR_CON0_XOSC32_CK 
PMIC_FQMTR_CON0_DCXO_F32K_CK 
PMIC_FQMTR_CON0_EOSC32_CK 
PMIC_FQMTR_CON0_XOSC32_CK_DETECTON 
PMIC_FQMTR_CON0_FQM26M_CK 
PMIC_FQMTR_CON0_FQM32k_CK 
PMIC_FQMTR_CON0_TEST_CK 
PMIC_FQMTR_CON0_TCKSEL_MASK 
PMIC_FQMTR_CON0_BUSY 
PMIC_FQMTR_CON0_DCXO26M_EN 
PMIC_FQMTR_CON0_FQMTR_EN 

Definition at line 177 of file rtc.h.

◆ anonymous enum

anonymous enum
Enumerator
RTC_FQMTR_LOW_BASE 
RTC_FQMTR_HIGH_BASE 

Definition at line 191 of file rtc.h.

◆ anonymous enum

anonymous enum
Enumerator
RTC_XOSCCALI_START 
RTC_XOSCCALI_END 

Definition at line 196 of file rtc.h.

◆ anonymous enum

anonymous enum
Enumerator
RTC_TC_MTH_MASK 

Definition at line 201 of file rtc.h.

◆ anonymous enum

anonymous enum
Enumerator
RTC_K_EOSC_RSV_0 
RTC_K_EOSC_RSV_1 
RTC_K_EOSC_RSV_2 

Definition at line 205 of file rtc.h.

Function Documentation

◆ rtc_bbpu_power_on()

void rtc_bbpu_power_on ( void  )

Definition at line 286 of file rtc_mt6359p.c.

References mt6366_set_power_hold(), PMIC_PWRHOLD, pmic_set_power_hold(), RTC_BBPU, RTC_BBPU_AUTO, RTC_BBPU_ENABLE_ALARM, RTC_BBPU_KEY, RTC_BBPU_PWREN, RTC_BBPU_RELOAD, rtc_info, rtc_read(), rtc_write(), rtc_write_field(), and rtc_write_trigger().

Referenced by rtc_boot().

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◆ rtc_boot()

void rtc_boot ( void  )

Definition at line 315 of file rtc_mt6359p.c.

References dcxo_init(), PMIC_RG_DCXO_CW02, PMIC_RG_SCK_TOP_CON0, PMIC_RG_TOP_CKPDN, PMIC_RG_TOP_CKPDN2, pwrap_write_field(), rtc_bbpu_power_on(), rtc_boot_common(), rtc_enable_dcxo(), rtc_info, rtc_read(), rtc_write(), and rtc_write_field().

Referenced by platform_romstage_main().

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◆ rtc_get_frequency_meter()

◆ rtc_gpio_init()

bool rtc_gpio_init ( void  )

Definition at line 71 of file rtc_mt6359p.c.

References PMIC_RG_TOP_CKPDN_CON1_CLR, PMIC_RG_TOP_CKSEL_CON0_SET, pwrap_write_field(), RTC_CON, RTC_CON_EOSC32_LPEN, RTC_CON_F32KOB, RTC_CON_GOE, RTC_CON_GPEN, RTC_CON_GPU, RTC_CON_LPRST, RTC_CON_LPSTA_RAW, RTC_CON_XOSC32_LPEN, rtc_read(), rtc_write(), and rtc_write_trigger().

Referenced by rtc_init(), and rtc_osc_init().

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◆ rtc_init()

◆ rtc_read()

◆ rtc_write()