ramstage.h File Reference

#include <device/device.h>
#include <fsp/api.h>
#include <fsp/util.h>
#include <soc/soc_chip.h>

Include dependency graph for ramstage.h:

Go to the source code of this file.

Functions
void	mainboard_silicon_init_params (FSP_S_CONFIG *params)
void	mainboard_update_soc_chip_config (struct soc_intel_tigerlake_config *config)
void	soc_init_pre_device (void *chip_info)

Function Documentation

mainboard_silicon_init_params()

void mainboard_silicon_init_params

(

FSP_S_CONFIG *

params

)

Definition at line 8 of file ramstage.c.

References ARRAY_SIZE, BIOS_DEBUG, gpio_configure_pads(), gpio_table, mainboard_configure_gpios(), memset(), params, printk, variant_configure_fsps(), and variant_silicon_init_params().

Referenced by platform_fsp_silicon_init_params_cb().

Here is the call graph for this function:

Here is the caller graph for this function:

mainboard_update_soc_chip_config()

void mainboard_update_soc_chip_config

(

struct soc_intel_tigerlake_config *

config

)

Definition at line 84 of file mainboard.c.

References BIOS_ERR, BIOS_INFO, CONFIG, cr50_is_long_interrupt_pulse_enabled(), soc_intel_tigerlake_config::gpio_override_pm, soc_intel_tigerlake_config::gpio_pm, LPM_S0i3_4, soc_intel_tigerlake_config::LpmStateDisableMask, memset(), printk, and tlcl_lib_init().

Here is the call graph for this function:

soc_init_pre_device()

void soc_init_pre_device

(

void *

chip_info

)

Definition at line 137 of file chip.c.

References BIOS_INFO, CONFIG, cse_send_end_of_post(), fsp_display_fvi_version_hob(), fsp_silicon_init(), get_pch_pcie_rp_table(), get_tbt_pcie_rp_table(), pch_h_rp_groups, pch_lp_rp_groups, pch_rp_groups, pcie_rp_update_devicetree(), printk, soc_fill_gpio_pm_configuration(), soc_get_pch_rp_groups(), and soc_gpio_pm_configuration().

Referenced by soc_init().

Here is the call graph for this function:

Here is the caller graph for this function: