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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <console/console.h>
#include <delay.h>
#include <device/pci_def.h>
#include <device/pci_ops.h>
#include <device/smbus_host.h>
#include <cf9_reset.h>
#include <device/mmio.h>
#include <device/device.h>
#include <lib.h>
#include <pc80/mc146818rtc.h>
#include <spd.h>
#include <string.h>
#include "raminit.h"
#include "i945.h"
#include "chip.h"
#include <device/dram/ddr2.h>
#include <timestamp.h>
Go to the source code of this file.
Data Structures | |
struct | timings |
Macros | |
#define | PRINTK_DEBUG(x...) |
#define | RAM_INITIALIZATION_COMPLETE (1 << 19) |
#define | RAM_COMMAND_SELF_REFRESH (0x0 << 16) |
#define | RAM_COMMAND_NOP (0x1 << 16) |
#define | RAM_COMMAND_PRECHARGE (0x2 << 16) |
#define | RAM_COMMAND_MRS (0x3 << 16) |
#define | RAM_COMMAND_EMRS (0x4 << 16) |
#define | RAM_COMMAND_CBR (0x6 << 16) |
#define | RAM_COMMAND_NORMAL (0x7 << 16) |
#define | RAM_EMRS_1 (0x0 << 21) |
#define | RAM_EMRS_2 (0x1 << 21) |
#define | RAM_EMRS_3 (0x2 << 21) |
#define | DEFAULT_PCI_MMIO_SIZE 768 |
#define | GFX_FREQUENCY_CAP_166MHZ 0x04 |
#define | GFX_FREQUENCY_CAP_200MHZ 0x03 |
#define | GFX_FREQUENCY_CAP_250MHZ 0x02 |
#define | GFX_FREQUENCY_CAP_ALL 0x00 |
#define | T_RR_7_8US 2000000 |
#define | T_RR_15_6US 4000000 |
#define | REFRESH_7_8US 1 |
#define | REFRESH_15_6US 0 |
#define | CRCLK_166MHz 0x00 |
#define | CRCLK_200MHz 0x01 |
#define | CRCLK_250MHz 0x03 |
#define | CRCLK_400MHz 0x05 |
#define | CDCLK_200MHz 0x00 |
#define | CDCLK_320MHz 0x40 |
#define | VOLTAGE_1_05 0x00 |
#define | VOLTAGE_1_50 0x01 |
#define | EA_DUALCHANNEL_XOR_BANK_RANK_MODE (0xd4 << 24) |
#define | EA_DUALCHANNEL_XOR_BANK_MODE (0xf4 << 24) |
#define | EA_DUALCHANNEL_BANK_RANK_MODE (0xc2 << 24) |
#define | EA_DUALCHANNEL_BANK_MODE (0xe2 << 24) |
#define | EA_SINGLECHANNEL_XOR_BANK_RANK_MODE (0x91 << 24) |
#define | EA_SINGLECHANNEL_XOR_BANK_MODE (0xb1 << 24) |
#define | EA_SINGLECHANNEL_BANK_RANK_MODE (0x80 << 24) |
#define | EA_SINGLECHANNEL_BANK_MODE (0xa0 << 24) |
#define | RTT_ODT_NONE 0 |
#define | RTT_ODT_50_OHM ((1 << 9) | (1 << 5)) |
#define | RTT_ODT_75_OHM (1 << 5) |
#define | RTT_ODT_150_OHM (1 << 9) |
#define | EMRS_OCD_DEFAULT ((1 << 12) | (1 << 11) | (1 << 10)) |
#define | MRS_CAS_3 (3 << 7) |
#define | MRS_CAS_4 (4 << 7) |
#define | MRS_CAS_5 (5 << 7) |
#define | MRS_TWR_3 (2 << 12) |
#define | MRS_TWR_4 (3 << 12) |
#define | MRS_TWR_5 (4 << 12) |
#define | MRS_BT (1 << 6) |
#define | MRS_BL4 (2 << 3) |
#define | MRS_BL8 (3 << 3) |
Enumerations | |
enum | { DQ2030 , DQ2330 , CMD2710 , CMD3210 , CLK2030 , CTL3215 , CTL3220 , NC } |
Variables | |
static const u32 | dq2030 [] |
static const u32 | dq2330 [] |
static const u32 | cmd2710 [] |
static const u32 | cmd3210 [] |
static const u32 | clk2030 [] |
static const u32 | ctl3215 [] |
static const u32 | ctl3220 [] |
static const u32 | nc [] |
static const u8 | dual_channel_slew_group_lookup [] |
static const u8 | single_channel_slew_group_lookup [] |
#define CDCLK_200MHz 0x00 |
#define CDCLK_320MHz 0x40 |
#define CRCLK_166MHz 0x00 |
#define CRCLK_200MHz 0x01 |
#define CRCLK_250MHz 0x03 |
#define CRCLK_400MHz 0x05 |
#define EMRS_OCD_DEFAULT ((1 << 12) | (1 << 11) | (1 << 10)) |
#define REFRESH_15_6US 0 |
#define REFRESH_7_8US 1 |
#define T_RR_15_6US 4000000 |
#define T_RR_7_8US 2000000 |
#define VOLTAGE_1_05 0x00 |
#define VOLTAGE_1_50 0x01 |
anonymous enum |
Definition at line 463 of file raminit.c.
References BIOS_DEBUG, timings::cas_mask, die(), timings::min_tCLK_cas, normalize_tck(), printk, sdram_capabilities_max_supported_memory_frequency(), spd_get_msbs(), TCK_200MHZ, TCK_266MHZ, and TCK_333MHZ.
Referenced by sdram_get_dram_configuration().
Definition at line 512 of file raminit.c.
References BIOS_DEBUG, die(), DIV_ROUND_UP, timings::max_tRR, timings::min_tRAS, timings::min_tRCD, timings::min_tRFC, timings::min_tRP, timings::min_tWR, printk, REFRESH_15_6US, REFRESH_7_8US, T_RR_15_6US, and T_RR_7_8US.
Referenced by sdram_get_dram_configuration().
Definition at line 52 of file raminit.c.
References DCC, mchbar_read32(), mchbar_write32(), PRINTK_DEBUG, RAM_COMMAND_NORMAL, RAM_INITIALIZATION_COMPLETE, and udelay().
Referenced by sdram_init_complete(), and sdram_jedec_enable().
Definition at line 107 of file raminit.c.
References BIOS_DEBUG, CLKCFG, CONFIG, mchbar_read32(), and printk.
Referenced by sdram_program_clock_crossing(), and sdram_program_pll_settings().
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loop over dimms and save maximal timings
i945 supports two DIMMs, in two configurations:
In practice dual channel mainboards have their SPD at 0x50/0x52 whereas single channel configurations have their SPD at 0x50/0x51.
The capability register knows a lot about the channel configuration but for now we stick with the information we gather via SPD.
There are 5 different possible populations for a DIMM socket: 0. x16 double ranked (X16DS)
Definition at line 287 of file raminit.c.
References BIOS_DEBUG, BIOS_INFO, BIOS_WARNING, timings::cas_mask, CONFIG, die(), DIMM_SOCKETS, dram_print_spd_ddr2(), get_dimm_spd_address(), hexdump(), MAX, timings::max_tRR, memset(), MIN, timings::min_tCLK_cas, timings::min_tRAS, timings::min_tRCD, timings::min_tRFC, timings::min_tRP, timings::min_tWR, printk, sdram_capabilities_dual_channel(), smbus_read_byte(), SPD_CAS_LATENCY_DDR2_3, SPD_CAS_LATENCY_DDR2_4, SPD_CAS_LATENCY_DDR2_5, spd_decode_ddr2(), spd_dimm_is_registered_ddr2(), SPD_MEMORY_TYPE, SPD_MEMORY_TYPE_SDRAM_DDR2, SPD_SIZE_MAX_DDR2, SPD_STATUS_OK, SYSINFO_DIMM_NOT_POPULATED, SYSINFO_DIMM_X16DS, SYSINFO_DIMM_X16SS, SYSINFO_DIMM_X8DDS, SYSINFO_DIMM_X8DS, SYSINFO_PACKAGE_STACKED, and UINT32_MAX.
Referenced by sdram_get_dram_configuration().
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Definition at line 43 of file raminit.c.
References device.
Referenced by gather_common_timing().
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Definition at line 92 of file raminit.c.
References BIOS_DEBUG, CLKCFG, CONFIG, mchbar_read32(), offset, and printk.
Referenced by init_pm(), and sdram_program_clock_crossing().
Definition at line 73 of file raminit.c.
References offset, PRINTK_DEBUG, and read32().
Referenced by sdram_jedec_enable().
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Definition at line 202 of file raminit.c.
References HOST_BRIDGE, and pci_read_config8().
Referenced by sdram_program_graphics_frequency().
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determine whether chipset is capable of two memory channels
Definition at line 176 of file raminit.c.
References HOST_BRIDGE, and pci_read_config32().
Referenced by gather_common_timing(), sdram_jedec_enable(), sdram_rcomp_buffer_strength_and_slew(), and sdram_set_channel_mode().
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Definition at line 187 of file raminit.c.
References HOST_BRIDGE, and pci_read_config8().
Referenced by sdram_enhanced_addressing_mode().
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determine whether chipset is capable of dual channel interleaved mode
Definition at line 160 of file raminit.c.
References HOST_BRIDGE, and pci_read_config32().
Referenced by sdram_set_channel_mode().
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Definition at line 132 of file raminit.c.
References HOST_BRIDGE, and pci_read_config32().
Referenced by choose_tclk().
Definition at line 213 of file raminit.c.
References BIOS_DEBUG, sysinfo::boot_path, BOOT_PATH_RESUME, CONFIG, full_reset(), GEN_PMCON_2, GEN_PMCON_3, mchbar_read8(), mchbar_setbits8, PCI_DEV, pci_or_config8(), pci_read_config8(), pci_write_config8(), printk, SLFRCS, and SYSINFO_DIMM_NOT_POPULATED.
Referenced by sdram_initialize().
Definition at line 1970 of file raminit.c.
References FSBPMC3, mchbar_read32(), mchbar_write32(), and SBTEST.
Referenced by sdram_initialize().
Definition at line 80 of file raminit.c.
References BIOS_DEBUG, mchbar_read32(), and printk.
Referenced by i945_late_initialization().
Enable clocks to populated sockets.
Definition at line 2445 of file raminit.c.
References C0DCLKDIS, C1DCLKDIS, mchbar_write8(), and SYSINFO_DIMM_NOT_POPULATED.
Referenced by sdram_initialize().
Definition at line 954 of file raminit.c.
References GBRCOMPCTL, mchbar_read32(), mchbar_write32(), and udelay().
Referenced by sdram_initialize().
Definition at line 1082 of file raminit.c.
References BIOS_DEBUG, C0DRC1, C1DRC1, DRTST, mchbar_read32(), mchbar_write32(), printk, RCVENMT, and SYSINFO_DIMM_NOT_POPULATED.
Referenced by sdram_initialize().
Definition at line 2017 of file raminit.c.
References C0DRC1, C1DRC1, EA_DUALCHANNEL_BANK_MODE, EA_DUALCHANNEL_BANK_RANK_MODE, EA_DUALCHANNEL_XOR_BANK_MODE, EA_DUALCHANNEL_XOR_BANK_RANK_MODE, EA_SINGLECHANNEL_BANK_MODE, EA_SINGLECHANNEL_BANK_RANK_MODE, EA_SINGLECHANNEL_XOR_BANK_MODE, EA_SINGLECHANNEL_XOR_BANK_RANK_MODE, mchbar_clrbits32, mchbar_setbits32, sdram_capabilities_enhanced_addressing_xor(), and SYSINFO_DIMM_NOT_POPULATED.
Referenced by sdram_post_jedec_initialization().
Definition at line 1013 of file raminit.c.
References DCC, GBRCOMPCTL, i945_silicon_revision(), mchbar_read32(), mchbar_write32(), ODTC, and SMSRCTL.
Referenced by sdram_initialize_system_memory_io().
Get generic DIMM parameters.
sysinfo | Central memory controller information structure |
This function gathers several pieces of information for each system DIMM: o DIMM width (x8 / x16) o DIMM rank (single ranked / dual ranked)
Also, some non-supported scenarios are detected.
Definition at line 566 of file raminit.c.
References choose_tclk(), derive_timings(), and gather_common_timing().
Referenced by sdram_initialize().
Definition at line 2661 of file raminit.c.
References do_ram_command(), PRINTK_DEBUG, and RAM_COMMAND_NORMAL.
Referenced by sdram_initialize().
boot_path | 0 = normal, 1 = reset, 2 = resume from s3 |
spd_addresses | pointer to a list of SPD addresses |
Definition at line 2682 of file raminit.c.
References BIOS_DEBUG, sys_info::boot_path, sysinfo::boot_path, BOOT_PATH_NORMAL, C0DMC, C1DMC, CONFIG, GCFC, GEN_PMCON_2, IGD_DEV, mchbar_setbits32, memset(), pci_and_config8(), PCI_DEV, pci_write_config16(), printk, sdram_detect_errors(), sdram_disable_fast_dispatch(), sdram_enable_memory_clocks(), sdram_enable_rcomp(), sdram_enable_system_memory_io(), sdram_get_dram_configuration(), sdram_init_complete(), sdram_initialize_system_memory_io(), sdram_jedec_enable(), sdram_on_die_termination(), sdram_post_jedec_initialization(), sdram_power_management(), sdram_pre_jedec_initialization(), sdram_program_clock_crossing(), sdram_program_graphics_frequency(), sdram_program_memory_frequency(), sdram_program_pll_settings(), sdram_program_receive_enable(), sdram_program_row_boundaries(), sdram_set_bank_architecture(), sdram_set_channel_mode(), sdram_set_row_attributes(), sdram_set_timing_and_control(), sdram_setup_processor_side(), sdram_thermal_management(), sys_info::spd_addresses, timestamp_add_now(), TS_INITRAM_END, and TS_INITRAM_START.
Definition at line 1039 of file raminit.c.
References BIOS_DEBUG, C0HCTC, C0WDLLCMC, C1HCTC, C1WDLLCMC, GBRCOMPCTL, mchbar_clrbits16, mchbar_read32(), mchbar_read8(), mchbar_setbits16, mchbar_setbits32, mchbar_write32(), mchbar_write8(), printk, sdram_force_rcomp(), sdram_program_dll_timings(), sdram_program_dram_width(), sdram_rcomp_buffer_strength_and_slew(), and WDLLBYPMODE.
Referenced by sdram_initialize().
Definition at line 2500 of file raminit.c.
References BIOS_DEBUG, die(), do_ram_command(), EMRS_OCD_DEFAULT, MRS_BL8, MRS_BT, MRS_CAS_3, MRS_CAS_4, MRS_CAS_5, MRS_TWR_3, MRS_TWR_4, MRS_TWR_5, printk, PRINTK_DEBUG, RAM_COMMAND_CBR, RAM_COMMAND_EMRS, RAM_COMMAND_MRS, RAM_COMMAND_NOP, RAM_COMMAND_PRECHARGE, RAM_EMRS_1, RAM_EMRS_2, RAM_EMRS_3, ram_read32(), RTT_ODT_150_OHM, RTT_ODT_75_OHM, and sdram_capabilities_dual_channel().
Referenced by sdram_initialize().
Enable On-Die Termination for DDR2.
Definition at line 2394 of file raminit.c.
References BIOS_DEBUG, C0ODT, C1ODT, mchbar_read32(), mchbar_write32(), ODTC, printk, and SYSINFO_DIMM_NOT_POPULATED.
Referenced by sdram_initialize().
Definition at line 2091 of file raminit.c.
References DCC, FSBPMC3, mchbar_read32(), mchbar_write32(), SBOCC, SBTEST, and sdram_enhanced_addressing_mode().
Referenced by sdram_initialize().
Definition at line 2120 of file raminit.c.
References C0DRC1, C0DRT2, C1DRC1, C1DRT2, C2C3TT, C3C4TT, CONFIG, CPCTL, DEVEN, DEVEN_D2F0, DEVEN_D2F1, ECO, FSBPMC1, FSBPMC3, FSBPMC4, GIPMC1, HGIPMC2, HOST_BRIDGE, i945_silicon_revision(), IGD_DEV, mchbar_clrbits32, mchbar_read16(), mchbar_read32(), mchbar_setbits32, mchbar_write16(), mchbar_write32(), MIPMC4, MIPMC5, MIPMC6, pci_or_config8(), pci_read_config8(), PMCFG, UPMC1, UPMC2, UPMC3, and UPMC4.
Referenced by sdram_initialize().
Definition at line 1983 of file raminit.c.
References C0AIT, C1AIT, mchbar_clrbits32, mchbar_read32(), mchbar_setbits32, mchbar_write32(), MMARB0, MMARB1, SMVREFC, and WCC.
Referenced by sdram_initialize().
Definition at line 1296 of file raminit.c.
References C0DRC1, C1DRC1, mchbar_read32(), and mchbar_write32().
Referenced by sdram_set_timing_and_control().
We add the indices according to our clocks from CLKCFG.
Definition at line 1809 of file raminit.c.
References BIOS_DEBUG, C0DCCFT, C1DCCFT, CCCFT, fsbclk(), mchbar_write32(), memclk(), and printk.
Referenced by sdram_initialize().
Definition at line 964 of file raminit.c.
References BIOS_DEBUG, C0R0B00DQST, C1R0B00DQST, CONFIG, DQSMT, mchbar_clrbits16, mchbar_setbits16, mchbar_write32(), mchbar_write8(), and printk.
Referenced by sdram_initialize_system_memory_io().
Definition at line 575 of file raminit.c.
References C0DRAMW, C1DRAMW, DIMM_SOCKETS, mchbar_write16(), SYSINFO_DIMM_NOT_POPULATED, SYSINFO_DIMM_X16DS, SYSINFO_DIMM_X16SS, SYSINFO_DIMM_X8DDS, and SYSINFO_DIMM_X8DS.
Referenced by sdram_initialize_system_memory_io().
Definition at line 1599 of file raminit.c.
References BIOS_DEBUG, CDCLK_200MHz, CDCLK_320MHz, CRCLK_166MHz, CRCLK_200MHz, CRCLK_250MHz, CRCLK_400MHz, DFT_STRAP1, GCFC, GFX_FREQUENCY_CAP_166MHZ, GFX_FREQUENCY_CAP_200MHZ, GFX_FREQUENCY_CAP_250MHZ, GFX_FREQUENCY_CAP_ALL, HOST_BRIDGE, i945_silicon_revision(), IGD_DEV, mchbar_read32(), sysinfo::mvco4x, pci_read_config8(), pci_update_config16(), pci_write_config8(), printk, sdram_capabilities_core_frequencies(), voltage, VOLTAGE_1_05, and VOLTAGE_1_50.
Referenced by sdram_initialize().
Definition at line 1730 of file raminit.c.
References BIOS_DEBUG, CLKCFG, CONFIG, die(), GEN_PMCON_2, mchbar_read32(), mchbar_write32(), sysinfo::mvco4x, offset, pci_and_config8(), PCI_DEV, and printk.
Referenced by sdram_initialize().
Definition at line 1327 of file raminit.c.
References C0DRC2, C1DRC2, mchbar_read32(), and mchbar_write32().
Referenced by sdram_set_timing_and_control().
Definition at line 1572 of file raminit.c.
References CPCTL, die(), fsbclk(), mchbar_clrbits16, mchbar_read16(), mchbar_write32(), mchbar_write8(), and PLLMON.
Referenced by sdram_initialize().
Definition at line 2369 of file raminit.c.
References sysinfo::boot_path, BOOT_PATH_RESUME, C0DRC1, C1DRC1, mchbar_clrbits32, mchbar_setbits32, MIPMC3, receive_enable_adjust(), REPC, sdram_recover_receive_enable(), and sdram_save_receive_enable().
Referenced by sdram_initialize().
Definition at line 1280 of file raminit.c.
References C0DRC0, C1DRC0, mchbar_clrbits32, mchbar_setbits32, and REFRESH_7_8US.
Referenced by sdram_set_timing_and_control().
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Definition at line 1138 of file raminit.c.
References BIOS_DEBUG, C0DRB0, C1DRB0, device::chip_info, DEFAULT_PCI_MMIO_SIZE, DIMM_SOCKETS, HOST_BRIDGE, mchbar_read32(), mchbar_write8(), MIN, NULL, northbridge_intel_i945_config::pci_mmio_size, pci_read_config8(), pci_write_config16(), pci_write_config8(), pcidev_on_root(), printk, TOLUD, and TOM.
Referenced by sdram_initialize().
Definition at line 899 of file raminit.c.
References BIOS_DEBUG, ctl3220, G1SC, G1SRPUT, G2SC, G2SRPUT, G3SC, G3SRPUT, G4SC, G4SRPUT, G5SC, G5SRPUT, G6SC, G6SRPUT, G7SC, G7SRPUT, G8SC, G8SRPUT, mchbar_write8(), nc, printk, sdram_capabilities_dual_channel(), sdram_write_slew_rates(), slew_group_lookup(), and SYSINFO_PACKAGE_STACKED.
Referenced by sdram_initialize_system_memory_io().
Definition at line 2343 of file raminit.c.
References C0DRT1, C0WL0REOST, C1DRT1, C1WL0REOST, cmos_read(), mchbar_read32(), mchbar_write32(), mchbar_write8(), and RCVENMT.
Referenced by sdram_program_receive_enable().
Definition at line 2308 of file raminit.c.
References C0DRT1, C0WL0REOST, C1DRT1, C1WL0REOST, cmos_write(), mchbar_read32(), mchbar_read8(), and RCVENMT.
Referenced by sdram_program_receive_enable().
Definition at line 1251 of file raminit.c.
References BIOS_SPEW, C0BNKARC, C1BNKARC, DIMM_SOCKETS, mchbar_clrbits16, mchbar_setbits16, printk, and SYSINFO_DIMM_NOT_POPULATED.
Referenced by sdram_initialize().
Definition at line 1524 of file raminit.c.
References BIOS_DEBUG, DCC, mchbar_read32(), mchbar_write32(), printk, PRINTK_DEBUG, sdram_capabilities_dual_channel(), sdram_capabilities_interleave(), and SYSINFO_DIMM_NOT_POPULATED.
Referenced by sdram_initialize().
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Definition at line 1198 of file raminit.c.
References BIOS_DEBUG, C0DRA0, C1DRA0, die(), DIMM_SOCKETS, mchbar_write16(), printk, and SYSINFO_DIMM_NOT_POPULATED.
Referenced by sdram_initialize().
Definition at line 1349 of file raminit.c.
References BURSTLENGTH, C0DRC0, C0DRT0, C0DRT1, C0DRT2, C0DRT3, C1DRC0, C1DRT0, C1DRT1, C1DRT2, C1DRT3, DIMM_SOCKETS, mchbar_read32(), mchbar_write32(), sdram_program_cke_tristate(), sdram_program_odt_tristate(), sdram_program_refresh_rate(), SYSINFO_DIMM_NOT_POPULATED, SYSINFO_DIMM_X16DS, and SYSINFO_DIMM_X16SS.
Referenced by sdram_initialize().
Definition at line 2667 of file raminit.c.
References FSBPMC3, i945_silicon_revision(), mchbar_setbits32, mchbar_setbits8, and SLPCTL.
Referenced by sdram_initialize().
Definition at line 2297 of file raminit.c.
References mchbar_write8(), TCO0, and TCO1.
Referenced by sdram_initialize().
Definition at line 628 of file raminit.c.
References mchbar_write32(), and offset.
Referenced by sdram_rcomp_buffer_strength_and_slew().
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Definition at line 765 of file raminit.c.
References clk2030, CLK2030, cmd2710, CMD2710, cmd3210, CMD3210, ctl3215, CTL3215, ctl3220, CTL3220, dq2030, DQ2030, dq2330, DQ2330, dual_channel_slew_group_lookup, nc, NC, and single_channel_slew_group_lookup.
Referenced by sdram_rcomp_buffer_strength_and_slew().
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Definition at line 664 of file raminit.c.
Referenced by slew_group_lookup().
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Definition at line 650 of file raminit.c.
Referenced by slew_group_lookup().
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Definition at line 657 of file raminit.c.
Referenced by slew_group_lookup().
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Definition at line 671 of file raminit.c.
Referenced by slew_group_lookup().
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Definition at line 678 of file raminit.c.
Referenced by sdram_rcomp_buffer_strength_and_slew(), and slew_group_lookup().
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Definition at line 636 of file raminit.c.
Referenced by slew_group_lookup().
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Definition at line 643 of file raminit.c.
Referenced by slew_group_lookup().
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Definition at line 685 of file raminit.c.
Referenced by sdram_rcomp_buffer_strength_and_slew(), and slew_group_lookup().
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