coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <spd.h>
#include <delay.h>
#include <stdint.h>
#include <device/mmio.h>
#include <device/pci_ops.h>
#include <device/pci_def.h>
#include <device/smbus_host.h>
#include <console/console.h>
#include <timestamp.h>
#include "i440bx.h"
#include "raminit.h"
Go to the source code of this file.
Data Structures | |
struct | dimm_size |
Macros | |
#define | PRINT_DEBUG(x...) |
#define | DUMPNORTH() |
#define | RAM_COMMAND_NORMAL 0x0 |
#define | RAM_COMMAND_NOP 0x1 |
#define | RAM_COMMAND_PRECHARGE 0x2 |
#define | RAM_COMMAND_MRS 0x3 |
#define | RAM_COMMAND_CBR 0x4 |
Functions | |
static void | do_ram_command (u32 command) |
Send the specified RAM command to all DIMMs. More... | |
static void | set_dram_buffer_strength (void) |
static void | spd_enable_refresh (void) |
static void | sdram_set_registers (void) |
static struct dimm_size | spd_get_dimm_size (unsigned int device) |
static void | set_dram_row_attributes (void) |
static void | sdram_set_spd_registers (void) |
static void | sdram_enable (void) |
void __weak | enable_spd (void) |
void __weak | disable_spd (void) |
void | sdram_initialize (int s3resume) |
Variables | |
static const uint32_t | refresh_rate_map [] |
static const u8 | register_values [] |
Definition at line 1003 of file raminit.c.
Referenced by sdram_initialize().
Send the specified RAM command to all DIMMs.
command | The RAM command to send to the DIMM(s). |
Definition at line 350 of file raminit.c.
References addr, DIMM_SOCKETS, DRB, NB, pci_read_config16(), pci_read_config8(), pci_write_config16(), RAM_COMMAND_MRS, RAM_COMMAND_NORMAL, read32(), and SDRAMC.
Referenced by sdram_enable().
Definition at line 1002 of file raminit.c.
Referenced by sdram_initialize().
Definition at line 957 of file raminit.c.
References do_ram_command(), DUMPNORTH, NB, pci_write_config8(), PMCR, PRINT_DEBUG, RAM_COMMAND_CBR, RAM_COMMAND_MRS, RAM_COMMAND_NOP, RAM_COMMAND_NORMAL, RAM_COMMAND_PRECHARGE, spd_enable_refresh(), and udelay().
Referenced by sdram_initialize().
void sdram_initialize | ( | int | s3resume | ) |
Definition at line 1005 of file raminit.c.
References disable_spd(), dump_spd_registers, enable_spd(), sdram_enable(), sdram_set_registers(), sdram_set_spd_registers(), timestamp_add_now(), TS_INITRAM_END, and TS_INITRAM_START.
Definition at line 643 of file raminit.c.
References ARRAY_SIZE, DUMPNORTH, NB, pci_write_config8(), PRINT_DEBUG, and register_values.
Referenced by sdram_initialize().
Definition at line 948 of file raminit.c.
References set_dram_buffer_strength(), and set_dram_row_attributes().
Referenced by sdram_initialize().
Definition at line 403 of file raminit.c.
References CONFIG, DRB0, DRB3, DRB7, MBFS, MBSC, NB, NBXCFG, pci_read_config8(), pci_write_config16(), and pci_write_config8().
Referenced by sdram_set_spd_registers().
Definition at line 732 of file raminit.c.
References BIOS_ERR, device, die(), DIMM0, DIMM_SOCKETS, DRAMC, DRB, MODULE_REGISTERED, NB, NBXCFG, pci_read_config8(), pci_write_config16(), pci_write_config8(), PGPOL, PRINT_DEBUG, printk, RPS, dimm_size::side1, dimm_size::side2, smbus_read_byte(), SPD_DIMM_CONFIG_TYPE, SPD_ERROR_CHECKING_SDRAM_WIDTH, spd_get_dimm_size(), SPD_MEMORY_TYPE, SPD_MEMORY_TYPE_EDO, SPD_MEMORY_TYPE_SDRAM, SPD_MODULE_ATTRIBUTES, SPD_MODULE_DATA_WIDTH_LSB, SPD_NUM_BANKS_PER_SDRAM, SPD_NUM_COLUMNS, SPD_NUM_DIMM_BANKS, value, and width.
Referenced by sdram_set_spd_registers().
Definition at line 620 of file raminit.c.
References DIMM0, DIMM_SOCKETS, DRAMC, NB, pci_read_config8(), pci_write_config8(), PRINT_DEBUG, refresh_rate_map, smbus_read_byte(), SPD_REFRESH, and value.
Referenced by sdram_enable().
Definition at line 643 of file raminit.c.
Referenced by set_dram_row_attributes().
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Definition at line 45 of file raminit.c.
Referenced by spd_enable_refresh().
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Definition at line 50 of file raminit.c.
Referenced by sdram_set_registers().