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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <console/console.h>
#include <device/pci_ehci.h>
#include <device/mmio.h>
#include <device/pci_ops.h>
#include <device/pci.h>
#include <device/pci_def.h>
#include <string.h>
#include "ehci_debug.h"
#include "ehci.h"
Go to the source code of this file.
Functions | |
int | ehci_debug_hw_enable (unsigned int *base, unsigned int *dbg_offset) |
void | ehci_debug_select_port (unsigned int port) |
u8 * | pci_ehci_base_regs (pci_devfn_t sdev) |
Definition at line 19 of file pci_ehci.c.
References base, EHCI_BAR_INDEX, PCI_CAP_ID_EHCI_DEBUG, PCI_CAP_ID_PM, PCI_CLASS_REVISION, PCI_COMMAND, PCI_COMMAND_MASTER, PCI_COMMAND_MEMORY, PCI_DEV2SEGBUS, PCI_EHCI_CLASSCODE, pci_ehci_dbg_dev(), PCI_PM_CTRL, PCI_PM_CTRL_PME_ENABLE, PCI_PM_CTRL_STATE_MASK, pci_s_find_capability(), pci_s_read_config16(), pci_s_read_config32(), pci_s_write_config16(), pci_s_write_config32(), and pci_s_write_config8().
Referenced by usbdebug_hw_init().
Definition at line 62 of file pci_ehci.c.
References pci_ehci_dbg_dev(), and pci_ehci_dbg_set_port().
Referenced by usbdebug_init_().
u8* pci_ehci_base_regs | ( | pci_devfn_t | sdev | ) |
Definition at line 105 of file pci_ehci.c.
References base, EHCI_BAR_INDEX, HC_LENGTH, pci_s_read_config32(), and read32().
Referenced by pci_ehci_dbg_set_port().