coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
enable_usbdebug.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 // Use simple device model for this file even in ramstage
4 #define __SIMPLE_DEVICE__
5 
6 #include <stdint.h>
7 #include <arch/io.h>
8 #include <device/mmio.h>
9 #include <device/pci_ehci.h>
10 #include <device/pci_def.h>
11 #include "hudson.h"
12 
13 #define DEBUGPORT_MISC_CONTROL 0x80
14 
15 pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx)
16 {
17  /* Enable all of the USB controllers */
18  outb(0xEF, PM_INDEX);
19  outb(0x7F, PM_DATA);
20 
21  if (hcd_idx == 3)
22  return PCI_DEV(0, 0x16, 2);
23  else if (hcd_idx == 2)
24  return PCI_DEV(0, 0x13, 2);
25  else
26  return PCI_DEV(0, 0x12, 2);
27 }
28 
29 void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port)
30 {
31  u8 *base_regs = pci_ehci_base_regs(dev);
32  u32 reg32;
33 
34  /* Write the port number to DEBUGPORT_MISC_CONTROL[31:28]. */
35  reg32 = read32(base_regs + DEBUGPORT_MISC_CONTROL);
36  reg32 &= ~(0xf << 28);
37  reg32 |= (port << 28);
38  reg32 |= (1 << 27); /* Enable Debug Port port number remapping. */
39  write32(base_regs + DEBUGPORT_MISC_CONTROL, reg32);
40 }
#define PM_INDEX
Definition: acpimmio.h:10
#define PM_DATA
Definition: acpimmio.h:11
static void write32(void *addr, uint32_t val)
Definition: mmio.h:40
static uint32_t read32(const void *addr)
Definition: mmio.h:22
void outb(u8 val, u16 port)
port
Definition: i915.h:29
u8 * pci_ehci_base_regs(pci_devfn_t sdev)
Definition: pci_ehci.c:105
#define PCI_DEV(SEGBUS, DEV, FN)
Definition: pci_type.h:14
u32 pci_devfn_t
Definition: pci_type.h:8
pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx)
void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port)
#define DEBUGPORT_MISC_CONTROL
uint32_t u32
Definition: stdint.h:51
uint8_t u8
Definition: stdint.h:45