coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
enable_usbdebug.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 // Use simple device model for this file even in ramstage
4 #define __SIMPLE_DEVICE__
5 
6 #include <stdint.h>
7 #include <device/pci_ops.h>
8 #include <device/pci_ehci.h>
9 #include <device/pci_def.h>
10 #include <soc/pci_devs.h>
11 #include <soc/southbridge.h>
12 #include <amdblocks/acpimmio.h>
13 
14 pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx)
15 {
17  return SOC_EHCI1_DEV;
18 }
19 
20 void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port)
21 {
22  u32 reg32, value;
23 
24  value = (port & 0x3) << DEBUG_PORT_SELECT_SHIFT;
27  reg32 &= ~DEBUG_PORT_MASK;
28  reg32 |= value;
30 }
pte_t value
Definition: mmu.c:91
port
Definition: i915.h:29
static __always_inline void pci_write_config32(const struct device *dev, u16 reg, u32 val)
Definition: pci_ops.h:76
static __always_inline u32 pci_read_config32(const struct device *dev, u16 reg)
Definition: pci_ops.h:58
void pm_io_write8(uint8_t reg, uint8_t value)
Definition: mmio_util.c:119
u32 pci_devfn_t
Definition: pci_type.h:8
pci_devfn_t pci_ehci_dbg_dev(unsigned int hcd_idx)
void pci_ehci_dbg_set_port(pci_devfn_t dev, unsigned int port)
#define SOC_EHCI1_DEV
Definition: pci_devs.h:171
uint32_t u32
Definition: stdint.h:51
#define DEBUG_PORT_MASK
Definition: southbridge.h:131
#define EHCI_HUB_CONFIG4
Definition: southbridge.h:128
#define DEBUG_PORT_ENABLE
Definition: southbridge.h:130
#define PM_USB_ENABLE
Definition: southbridge.h:74
#define DEBUG_PORT_SELECT_SHIFT
Definition: southbridge.h:129
#define PM_USB_ALL_CONTROLLERS
Definition: southbridge.h:75