coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
mca.c
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1 /* SPDX-License-Identifier: GPL-2.0-only */
2 
3 #include <amdblocks/reset.h>
4 #include <cpu/amd/msr.h>
5 #include <cpu/x86/lapic.h>
6 #include <cpu/x86/msr.h>
7 #include <console/console.h>
8 #include <types.h>
9 #include "mca_common_defs.h"
10 
11 bool mca_skip_check(void)
12 {
13  return !is_warm_reset();
14 }
15 
16 void mca_print_error(unsigned int bank)
17 {
18  msr_t msr;
19 
20  printk(BIOS_WARNING, "#MC Error: core %u, bank %u %s\n", initial_lapicid(), bank,
21  mca_get_bank_name(bank));
22 
23  msr = rdmsr(IA32_MC_STATUS(bank));
24  printk(BIOS_WARNING, " MC%u_STATUS = %08x_%08x\n", bank, msr.hi, msr.lo);
25  msr = rdmsr(IA32_MC_ADDR(bank));
26  printk(BIOS_WARNING, " MC%u_ADDR = %08x_%08x\n", bank, msr.hi, msr.lo);
27  msr = rdmsr(IA32_MC_MISC(bank));
28  printk(BIOS_WARNING, " MC%u_MISC = %08x_%08x\n", bank, msr.hi, msr.lo);
29  msr = rdmsr(IA32_MC_CTL(bank));
30  printk(BIOS_WARNING, " MC%u_CTL = %08x_%08x\n", bank, msr.hi, msr.lo);
31  msr = rdmsr(MC_CTL_MASK(bank));
32  printk(BIOS_WARNING, " MC%u_CTL_MASK = %08x_%08x\n", bank, msr.hi, msr.lo);
33 }
const char * mca_get_bank_name(unsigned int bank)
Definition: mca.c:48
bool mca_skip_check(void)
Definition: mca.c:11
void mca_print_error(unsigned int bank)
Definition: mca.c:16
#define printk(level,...)
Definition: stdlib.h:16
#define MC_CTL_MASK(bank)
Definition: msr.h:22
#define IA32_MC_ADDR(bank)
Definition: msr.h:81
static __always_inline msr_t rdmsr(unsigned int index)
Definition: msr.h:146
#define IA32_MC_STATUS(bank)
Definition: msr.h:62
#define IA32_MC_MISC(bank)
Definition: msr.h:83
#define IA32_MC_CTL(bank)
Definition: msr.h:60
static __always_inline unsigned int initial_lapicid(void)
Definition: lapic.h:126
#define BIOS_WARNING
BIOS_WARNING - Bad configuration.
Definition: loglevel.h:86
int is_warm_reset(void)
Definition: reset.c:21
unsigned int hi
Definition: msr.h:112
unsigned int lo
Definition: msr.h:111