11 default:
return "reserved";
31 base_address = starting_address;
32 next_address = base_address;
33 for (index = 0; index < 64; index += 8) {
34 next_address = starting_address + (memory_size *
37 if (next_type !=
type) {
39 base_address, next_address - 1,
41 base_address = next_address;
45 if (base_address != next_address)
47 base_address, next_address - 1,
59 msr.s =
rdmsr(msr_reg);
72 msr.s =
rdmsr(msr_reg);
95 "0x%08x%08x: IA32_MTRRCAP: %s%s%s%s%u variable MTRRs\n",
135 msr_a.s =
rdmsr(msr_reg);
136 msr_m.s =
rdmsr(msr_reg + 1);
138 base_address = (msr_a.u64 & 0xfffffffffffff000ULL)
141 "0x%016llx: PHYBASE%d: Address = 0x%016llx, %s\n",
142 msr_a.u64, index, base_address,
144 mask = (msr_m.u64 & 0xfffffffffffff000ULL) & address_mask;
147 "0x%016llx: PHYMASK%d: Length = 0x%016llx, Valid\n",
148 msr_m.u64, index,
length);
178 address_mask = (1ULL << address_bits) - 1;
182 for (i = 0; i < variable_mtrrs; i++)
188 if (
CONFIG(DISPLAY_MTRRS))
#define printk(level,...)
static void display_mtrrcap(void)
static void display_variable_mtrr(int index, uint64_t address_mask)
static void display_64k_mtrr(void)
static void display_16k_mtrr(uint32_t msr_reg, uint32_t starting_address, const char *name)
static void _display_mtrrs(void)
static const char * display_mtrr_type(uint32_t type)
static void display_4k_mtrr(uint32_t msr_reg, uint32_t starting_address, const char *name)
static void display_mtrr_def_type(void)
asmlinkage void display_mtrrs(void)
static void display_mtrr_fixed_types(uint64_t msr, uint32_t starting_address, uint32_t memory_size)
int cpu_phys_address_size(void)
static __always_inline msr_t rdmsr(unsigned int index)
#define BIOS_DEBUG
BIOS_DEBUG - Verbose output.
unsigned long long uint64_t
#define s(param, src_bits, pmcreg, dst_bits)
#define MTRR_FIX_4K_E0000
#define MTRR_FIX_64K_00000
#define MTRR_PHYS_BASE(reg)
#define MTRR_DEF_TYPE_MASK
static int get_var_mtrr_count(void)
#define MTRR_FIX_4K_D8000
#define MTRR_FIX_4K_C8000
#define MTRR_FIX_4K_E8000
#define MTRR_FIX_16K_A0000
#define MTRR_DEF_TYPE_FIX_EN
#define MTRR_FIX_4K_D0000
#define MTRR_FIX_4K_F0000
#define MTRR_FIX_4K_C0000
#define MTRR_FIX_16K_80000
#define MTRR_FIX_4K_F8000
#define MTRR_DEF_TYPE_MSR
#define MTRR_PHYS_MASK_VALID