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coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
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#include <assert.h>
#include <console/console.h>
#include <cpu/x86/msr.h>
#include <cpu/intel/cpu_ids.h>
#include <device/device.h>
#include <drivers/wifi/generic/wifi.h>
#include <fsp/fsp_debug_event.h>
#include <fsp/util.h>
#include <intelblocks/cpulib.h>
#include <intelblocks/pcie_rp.h>
#include <soc/gpio_soc_defs.h>
#include <soc/iomap.h>
#include <soc/msr.h>
#include <soc/pci_devs.h>
#include <soc/pcie.h>
#include <soc/romstage.h>
#include <soc/soc_chip.h>
#include <string.h>
Go to the source code of this file.
Macros | |
#define | FSP_CLK_NOTUSED 0xFF |
#define | FSP_CLK_LAN 0x70 |
#define | FSP_CLK_FREE_RUNNING 0x80 |
#define | CPU_PCIE_BASE 0x40 |
Enumerations | |
enum | vtd_base_index_type { VTD_GFX , VTD_IPU , VTD_VTVCO , VTD_TBT0 , VTD_TBT1 , VTD_TBT2 , VTD_TBT3 } |
#define CPU_PCIE_BASE 0x40 |
Definition at line 26 of file fsp_params.c.
#define FSP_CLK_FREE_RUNNING 0x80 |
Definition at line 24 of file fsp_params.c.
#define FSP_CLK_LAN 0x70 |
Definition at line 23 of file fsp_params.c.
#define FSP_CLK_NOTUSED 0xFF |
Definition at line 22 of file fsp_params.c.
enum vtd_base_index_type |
Enumerator | |
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VTD_GFX | |
VTD_IPU | |
VTD_VTVCO | |
VTD_TBT0 | |
VTD_TBT1 | |
VTD_TBT2 | |
VTD_TBT3 |
Definition at line 28 of file fsp_params.c.
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Definition at line 38 of file fsp_params.c.
References assert, CPU_PCIE_BASE, PCIE_RP_CPU, PCIE_RP_PCH, and type.
Referenced by pcie_rp_init().
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Definition at line 222 of file fsp_params.c.
References config, is_devfn_enabled(), memset(), and PCH_DEVFN_HDA.
Referenced by soc_memory_init_params().
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Definition at line 148 of file fsp_params.c.
References config, get_valid_prmrr_size(), msr_struct::lo, MSR_FLEX_RATIO, and rdmsr().
Referenced by soc_memory_init_params().
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Definition at line 98 of file fsp_params.c.
References ARRAY_SIZE, config, CONFIG, DDI_ENABLE_DDC, DDI_ENABLE_HPD, DDI_PORT_1, DDI_PORT_2, DDI_PORT_3, DDI_PORT_4, DDI_PORT_A, DDI_PORT_B, DDI_PORT_C, is_devfn_enabled(), and SA_DEVFN_IGD.
Referenced by soc_memory_init_params().
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Definition at line 185 of file fsp_params.c.
References is_devfn_enabled(), memset(), and SA_DEVFN_IPU.
Referenced by soc_memory_init_params().
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Definition at line 243 of file fsp_params.c.
References is_devfn_enabled(), and PCH_DEVFN_ISH.
Referenced by soc_memory_init_params().
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Definition at line 200 of file fsp_params.c.
References ARRAY_SIZE, config, DEVICE_PATH_GENERIC, DEVICE_PATH_PCI, find_dev_nested_path(), is_dev_enabled(), device::path, PCH_DEVFN_CNVI_WIFI, pci_root_bus(), device_path::type, and wifi_generic_cnvi_ddr_rfim_enabled().
Referenced by soc_memory_init_params().
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Definition at line 139 of file fsp_params.c.
References config.
Referenced by soc_memory_init_params().
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Definition at line 71 of file fsp_params.c.
References config, FSP_CLK_FREE_RUNNING, FSP_CLK_LAN, FSP_CLK_NOTUSED, get_cpu_pcie_rp_table(), get_pch_pcie_rp_table(), PCIE_CLK_FREE_RUNNING, PCIE_CLK_LAN, PCIE_RP_CPU, pcie_rp_enable_mask(), pcie_rp_init(), and PCIE_RP_PCH.
Referenced by soc_memory_init_params().
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Definition at line 165 of file fsp_params.c.
References CONFIG.
Referenced by soc_memory_init_params().
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Definition at line 194 of file fsp_params.c.
References is_devfn_enabled(), and PCH_DEVFN_SMBUS.
Referenced by soc_memory_init_params().
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Definition at line 249 of file fsp_params.c.
References is_devfn_enabled(), SA_DEVFN_TCSS_DMA0, SA_DEVFN_TCSS_DMA1, SA_DEVFN_TCSS_XDCI, and SA_DEVFN_TCSS_XHCI.
Referenced by soc_memory_init_params().
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Definition at line 324 of file fsp_params.c.
References CONFIG, is_devfn_enabled(), and SA_DEVFN_TMT.
Referenced by soc_memory_init_params().
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Definition at line 173 of file fsp_params.c.
References CONFIG, and PchSerialIoSkipInit.
Referenced by soc_memory_init_params().
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Definition at line 261 of file fsp_params.c.
References is_devfn_enabled(), SA_DEVFN_TBT0, SA_DEVFN_TBT1, SA_DEVFN_TBT2, and SA_DEVFN_TBT3.
Referenced by soc_memory_init_params().
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Definition at line 270 of file fsp_params.c.
References BIOS_ERR, CONFIG, cpu_get_cpuid(), cpuid, CPUID_ALDERLAKE_J0, CPUID_ALDERLAKE_Q0, GFXVT_BASE_ADDRESS, IPUVT_BASE_ADDRESS, printk, TBT0_BASE_ADDRESS, TBT1_BASE_ADDRESS, TBT2_BASE_ADDRESS, TBT3_BASE_ADDRESS, VTD_GFX, VTD_IPU, VTD_TBT0, VTD_TBT1, VTD_TBT2, VTD_TBT3, VTD_VTVCO, and VTVC0_BASE_ADDRESS.
Referenced by soc_memory_init_params().
Definition at line 389 of file fsp_params.c.
References BIOS_DEBUG, and printk.
Referenced by platform_fsp_memory_init_params_cb().
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Definition at line 48 of file fsp_params.c.
References BIOS_WARNING, BIT, pcie_rp_config::clk_req, pcie_rp_config::clk_src, clk_src_to_fsp(), PCIE_RP_CLK_REQ_UNUSED, PCIE_RP_CLK_SRC_UNUSED, printk, and type.
Referenced by fill_fspm_pcie_rp_params().
Definition at line 361 of file fsp_params.c.
References config, CONFIG, config_of_soc, fsp_debug_event_handler(), FSP_M_CONFIG, fsp_map_console_log_level(), mainboard_memory_init_params(), and soc_memory_init_params().
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Definition at line 335 of file fsp_params.c.
References ARRAY_SIZE, config, fill_fspm_audio_params(), fill_fspm_cpu_params(), fill_fspm_igd_params(), fill_fspm_ipu_params(), fill_fspm_ish_params(), fill_fspm_misc_params(), fill_fspm_mrc_params(), fill_fspm_pcie_rp_params(), fill_fspm_security_params(), fill_fspm_smbus_params(), fill_fspm_tcss_params(), fill_fspm_trace_params(), fill_fspm_uart_params(), fill_fspm_usb4_params(), fill_fspm_vtd_params(), FSP_M_CONFIG, and void().
Referenced by platform_fsp_memory_init_params_cb().