coreboot
coreboot is an Open Source project aimed at replacing the proprietary BIOS found in most computers.
amd_pci_mmconf.c
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/* SPDX-License-Identifier: GPL-2.0-only */
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#include <
amdblocks/amd_pci_mmconf.h
>
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#include <
cpu/amd/msr.h
>
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#include <
cpu/x86/msr.h
>
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#include <
cpu/x86/mtrr.h
>
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void
enable_pci_mmconf
(
void
)
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{
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msr_t
mmconf;
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mmconf.
hi
= 0;
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mmconf.
lo
= CONFIG_ECAM_MMCONF_BASE_ADDRESS |
MMIO_RANGE_EN
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|
fms
(CONFIG_ECAM_MMCONF_BUS_NUMBER) <<
MMIO_BUS_RANGE_SHIFT
;
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wrmsr
(
MMIO_CONF_BASE
, mmconf);
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}
enable_pci_mmconf
void enable_pci_mmconf(void)
Definition:
amd_pci_mmconf.c:8
amd_pci_mmconf.h
msr.h
MMIO_RANGE_EN
#define MMIO_RANGE_EN
Definition:
msr.h:25
MMIO_CONF_BASE
#define MMIO_CONF_BASE
Definition:
msr.h:24
MMIO_BUS_RANGE_SHIFT
#define MMIO_BUS_RANGE_SHIFT
Definition:
msr.h:26
msr.h
wrmsr
static __always_inline void wrmsr(unsigned int index, msr_t msr)
Definition:
msr.h:157
msr_struct
Definition:
msr.h:110
msr_struct::hi
unsigned int hi
Definition:
msr.h:112
msr_struct::lo
unsigned int lo
Definition:
msr.h:111
mtrr.h
fms
static unsigned int fms(unsigned int x)
Definition:
mtrr.h:156
src
soc
amd
common
block
pci
amd_pci_mmconf.c
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